From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 11/12] drm/i915: Disable CRT port after pipe on PCH platforms
Date: Thu, 21 May 2015 12:26:42 -0700 [thread overview]
Message-ID: <555E3172.2020001@virtuousgeek.org> (raw)
In-Reply-To: <1430835458-11187-12-git-send-email-ville.syrjala@linux.intel.com>
On 05/05/2015 07:17 AM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Follow the BSpec sequence for the CRT port as well on PCH platforms,
> ie. disable the pipe before the port.
>
> Didn't bother looking at DDI in detail yet, so leave that one be even
> though the CRT is a PCH port there.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_crt.c | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 93bb515..521af2c 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -207,6 +207,14 @@ static void intel_disable_crt(struct intel_encoder *encoder)
> intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
> }
>
> +static void pch_disable_crt(struct intel_encoder *encoder)
> +{
> +}
> +
> +static void pch_post_disable_crt(struct intel_encoder *encoder)
> +{
> + intel_disable_crt(encoder);
> +}
>
> static void hsw_crt_post_disable(struct intel_encoder *encoder)
> {
> @@ -888,7 +896,12 @@ void intel_crt_init(struct drm_device *dev)
> crt->adpa_reg = ADPA;
>
> crt->base.compute_config = intel_crt_compute_config;
> - crt->base.disable = intel_disable_crt;
> + if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev)) {
> + crt->base.disable = pch_disable_crt;
> + crt->base.post_disable = pch_post_disable_crt;
> + } else {
> + crt->base.disable = intel_disable_crt;
> + }
> crt->base.enable = intel_enable_crt;
> if (I915_HAS_HOTPLUG(dev))
> crt->base.hpd_pin = HPD_CRT;
>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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next prev parent reply other threads:[~2015-05-21 19:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-05 14:17 [PATCH 00/12] drm/i915: PCH modeset sequence fixes ville.syrjala
2015-05-05 14:17 ` [PATCH 01/12] drm/i915: Remove a bogus 12bpc "toggle" from intel_disable_hdmi() ville.syrjala
2015-05-21 19:04 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 02/12] drm/i915: Remove the double register write " ville.syrjala
2015-05-21 19:04 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 03/12] drm/i915: Clarfify the DP code platform checks ville.syrjala
2015-05-21 19:10 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 04/12] drm/i915: Clean up the CPT DP .get_hw_state() port readout ville.syrjala
2015-05-21 19:16 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 05/12] drm/i915: Fix DP enhanced framing for CPT ville.syrjala
2015-05-21 19:19 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 06/12] drm/i915: Use POSTING_READ() in intel_sdvo_write_sdvox() ville.syrjala
2015-05-06 11:30 ` Daniel Vetter
2015-05-05 14:17 ` [PATCH 07/12] drm/i915: Write the SDVO reg twice on IBX ville.syrjala
2015-05-21 19:20 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 08/12] drm/i915: Fix the IBX transcoder B workarounds ville.syrjala
2015-05-21 19:23 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 09/12] drm/i915: Disable HDMI port after the pipe on PCH platforms ville.syrjala
2015-05-21 19:24 ` Jesse Barnes
2015-05-05 14:17 ` [PATCH 10/12] drm/i915: Disable SDVO " ville.syrjala
2015-05-21 19:26 ` Jesse Barnes
2015-05-21 21:24 ` Daniel Vetter
2015-05-05 14:17 ` [PATCH 11/12] drm/i915: Disable CRT port after " ville.syrjala
2015-05-21 19:26 ` Jesse Barnes [this message]
2015-05-05 14:17 ` [PATCH 12/12] drm/i915: Disable FDI RX/TX before the ports ville.syrjala
2015-05-21 19:27 ` Jesse Barnes
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