From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] drm/i915: Use ilk_init_lp_watermarks() on BDW
Date: Thu, 21 May 2015 13:16:14 -0700 [thread overview]
Message-ID: <555E3D0E.5030504@virtuousgeek.org> (raw)
In-Reply-To: <1432056777-963-1-git-send-email-ville.syrjala@linux.intel.com>
On 05/19/2015 10:32 AM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We're not using ilk_init_lp_watermarks() on BDW for some reason.
> Probably due to the BDW patches and the relevant WM patches landing
> roughlly at the same time. Fix it up.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index ce1d079..206bd41 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6166,9 +6166,7 @@ static void broadwell_init_clock_gating(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
> enum pipe pipe;
>
> - I915_WRITE(WM3_LP_ILK, 0);
> - I915_WRITE(WM2_LP_ILK, 0);
> - I915_WRITE(WM1_LP_ILK, 0);
> + ilk_init_lp_watermarks(dev);
>
> /* WaSwitchSolVfFArbitrationPriority:bdw */
> I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
prev parent reply other threads:[~2015-05-21 20:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 17:32 [PATCH 1/3] drm/i915: Use ilk_init_lp_watermarks() on BDW ville.syrjala
2015-05-19 17:32 ` [PATCH 2/3] drm/i915: Move WaProgramL3SqcReg1Default:bdw to init_clock_gating() ville.syrjala
2015-05-21 20:16 ` Jesse Barnes
2015-05-19 17:32 ` [PATCH 3/3] drm/i915: Enable GTT caching on gen8 ville.syrjala
2015-05-21 9:48 ` shuang.he
2015-05-21 20:18 ` Jesse Barnes
2015-05-22 6:10 ` Daniel Vetter
2015-05-22 15:31 ` Jesse Barnes
2015-05-21 20:16 ` Jesse Barnes [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=555E3D0E.5030504@virtuousgeek.org \
--to=jbarnes@virtuousgeek.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox