From: "Siluvery, Arun" <arun.siluvery@linux.intel.com>
To: Dave Gordon <david.s.gordon@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode
Date: Tue, 09 Jun 2015 16:34:57 +0100 [thread overview]
Message-ID: <557707A1.7080505@linux.intel.com> (raw)
In-Reply-To: <557705CB.3040207@intel.com>
On 09/06/2015 16:27, Dave Gordon wrote:
> On 05/06/15 11:34, Arun Siluvery wrote:
>> Some of the WA applied using WA batch buffers perform writes to scratch page.
>> In the current flow WA are initialized before scratch obj is allocated.
>> This patch reorders intel_init_pipe_control() to have a valid scratch obj
>> before we initialize WA.
>>
>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
>> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_lrc.c | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>> index 0b3422a..20c56e4 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -1562,11 +1562,16 @@ static int logical_render_ring_init(struct drm_device *dev)
>> ring->emit_bb_start = gen8_emit_bb_start;
>>
>> ring->dev = dev;
>> +
>> + ret = intel_init_pipe_control(ring);
>> + if (ret)
>> + return ret;
>> +
>> ret = logical_ring_init(dev, ring);
>> if (ret)
>> return ret;
>>
>> - return intel_init_pipe_control(ring);
>> + return 0;
>> }
>
> You could squash the last several lines down to just:
>
> return logical_ring_init(dev, ring);
>
> .Dave.
>
yes but this is updated based on suggestion from Chris to allocate
wa_ctx page during ring init itself; in the updated version it is not
possible as we need to free that page also if ring_init fails.
I sent the updated patches in the same series so as to collate all
reviews instead of resending as a separate series.
regards
Arun
>
>
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next prev parent reply other threads:[~2015-06-09 15:34 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-05 10:34 [PATCH v3 0/6] Add Per-context WA using WA batch buffers Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 1/6] drm/i915/gen8: Add infrastructure to initialize " Arun Siluvery
2015-06-05 10:56 ` Chris Wilson
2015-06-05 11:24 ` Siluvery, Arun
2015-06-05 11:36 ` Chris Wilson
2015-06-05 11:56 ` Siluvery, Arun
2015-06-05 11:00 ` Chris Wilson
2015-06-15 15:22 ` Daniel Vetter
2015-06-15 15:23 ` Siluvery, Arun
2015-06-05 13:54 ` Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode Arun Siluvery
2015-06-05 13:55 ` Arun Siluvery
2015-06-09 15:27 ` Dave Gordon
2015-06-09 15:34 ` Siluvery, Arun [this message]
2015-06-05 10:34 ` [PATCH v3 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround Arun Siluvery
2015-06-05 13:56 ` Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround Arun Siluvery
2015-06-05 13:56 ` Arun Siluvery
2015-06-05 14:48 ` Ville Syrjälä
2015-06-12 11:51 ` Siluvery, Arun
2015-06-09 17:06 ` Dave Gordon
2015-06-05 10:34 ` [PATCH v3 5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround Arun Siluvery
2015-06-05 13:57 ` Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround Arun Siluvery
2015-06-05 13:57 ` Arun Siluvery
2015-06-09 18:43 ` Dave Gordon
2015-06-12 11:58 ` Siluvery, Arun
2015-06-12 17:03 ` Dave Gordon
2015-06-15 14:10 ` Siluvery, Arun
2015-06-15 17:29 ` Dave Gordon
2015-06-15 18:09 ` Siluvery, Arun
2015-06-15 15:27 ` Daniel Vetter
2015-06-06 8:20 ` shuang.he
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