From: Dave Gordon <david.s.gordon@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Daniel Vetter <daniel@ffwll.ch>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/15] drm/i915: Add i915_gem_object_write() to i915_gem.c
Date: Mon, 22 Jun 2015 12:59:00 +0100 [thread overview]
Message-ID: <5587F884.9050303@intel.com> (raw)
In-Reply-To: <20150619084415.GF14386@nuc-i3427.alporthouse.com>
On 19/06/15 09:44, Chris Wilson wrote:
> On Thu, Jun 18, 2015 at 07:07:46PM +0100, Dave Gordon wrote:
>> On 18/06/15 13:10, Chris Wilson wrote:
>>> On Thu, Jun 18, 2015 at 12:49:55PM +0100, Dave Gordon wrote:
>>>> On 17/06/15 13:02, Daniel Vetter wrote:
>>>>> Domain handling is required for all gem objects, and the resulting bugs if
>>>>> you don't for one-off objects are absolutely no fun to track down.
>>>>
>>>> Is it not the case that the new object returned by
>>>> i915_gem_alloc_object() is
>>>> (a) of a type that can be mapped into the GTT, and
>>>> (b) initially in the CPU domain for both reading and writing?
>>>>
>>>> So AFAICS the allocate-and-fill function I'm describing (to appear in
>>>> next patch series respin) doesn't need any further domain handling.
>>>
>>> A i915_gem_object_create_from_data() is a reasonable addition, and I
>>> suspect it will make the code a bit more succinct.
>>
>> I shall adopt this name for it :)
>>
>>> Whilst your statement is true today, calling set_domain is then a no-op,
>>> and helps document how you use the object and so reduces the likelihood
>>> of us introducing bugs in the future.
>>> -Chris
>>
>> So here's the new function ... where should the set-to-cpu-domain go?
>> After the pin_pages and before the sg_copy_from_buffer?
>
> Either, since the domain will not change whilst you have the lock,
> but if you do it before get_pages() you will have a slightly easier
> error path.
OK, call to i915_gem_object_set_to_cpu_domain(obj, true) added right
after the i915_gem_alloc_object(); also, since we now have multiple
failure paths where the ability to distinguish them might be useful (and
since this function is a public addition to the gem_object repertoire),
I've made it return object-or-error-code, with the incomplete-copy case
returning ERR_PTR(-EIO).
> Part of the reason why I want a function like this is so that I can
> replace it with a stolen object and so need to write the data through a
> temporary GGTT mapping. Speak now if you need more flags to the function
> to prevent certain classes of objects being created.
> -Chris
For the GuC, the firmware image is written once by the CPU and
thereafter read only by the DMA engine via a GGTT address; other uC
devices might have different requirements e.g. the CSR/DMC doesn't have
a DMA engine AFAIK and the f/w is transferred to the h/w via MMIO writes
by the CPU. The primary reason for storing the image in a GEM object
(rather than kmalloc'd space, as the DMC loader does) is to make it
pageable; it's needed multiple times, as we have to reload the f/w after
reset or on exit from low-power states, but not used the rest of the
time. So the existing objects seem a good match.
The GuC's pool and log objects, OTOH, must be permanently resident in
RAM and permanently mapped via the GGTT above GUC_WOPCM_OFFSET. So for
these it would be useful to have an allocator that *didn't* make the
object shmfs-backed.
.Dave.
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next prev parent reply other threads:[~2015-06-22 11:59 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-15 18:36 [PATCH 00/15] Batch submission via GuC Dave Gordon
2015-06-15 18:36 ` [PATCH 01/15] drm/i915: Add i915_gem_object_write() to i915_gem.c Dave Gordon
2015-06-15 20:09 ` Chris Wilson
2015-06-17 7:23 ` Dave Gordon
2015-06-17 12:02 ` Daniel Vetter
2015-06-18 11:49 ` Dave Gordon
2015-06-18 12:10 ` Chris Wilson
2015-06-18 18:07 ` Dave Gordon
2015-06-19 8:44 ` Chris Wilson
2015-06-22 11:59 ` Dave Gordon [this message]
2015-06-22 12:37 ` Chris Wilson
2015-06-23 16:54 ` Dave Gordon
2015-06-18 14:31 ` Daniel Vetter
2015-06-18 18:28 ` Dave Gordon
2015-06-24 9:32 ` Daniel Vetter
2015-06-25 12:28 ` Dave Gordon
2015-06-24 9:40 ` Chris Wilson
2015-06-15 18:36 ` [PATCH 02/15] drm/i915: Embedded microcontroller (uC) firmware loading support Dave Gordon
2015-06-17 12:05 ` Daniel Vetter
2015-06-18 12:11 ` Dave Gordon
2015-06-18 14:49 ` Daniel Vetter
2015-06-18 15:27 ` Chris Wilson
2015-06-18 15:35 ` Daniel Vetter
2015-06-18 15:49 ` Chris Wilson
2015-06-19 8:43 ` Dave Gordon
2015-06-24 10:29 ` Daniel Vetter
2015-07-06 12:44 ` Dave Gordon
2015-07-06 13:24 ` Daniel Vetter
2015-06-15 18:36 ` [PATCH 03/15] drm/i915: Add GuC-related module parameters Dave Gordon
2015-06-15 18:36 ` [PATCH 04/15] drm/i915: Add GuC-related header files Dave Gordon
2015-06-15 20:20 ` Chris Wilson
2015-06-17 15:01 ` Dave Gordon
2015-06-23 18:10 ` Dave Gordon
2015-06-24 7:41 ` Dave Gordon
2015-06-24 9:37 ` Daniel Vetter
2015-06-15 18:36 ` [PATCH 05/15] drm/i915: GuC-specific firmware loader Dave Gordon
2015-06-15 20:30 ` Chris Wilson
2015-06-18 17:53 ` Yu Dai
2015-06-18 20:12 ` Chris Wilson
2015-06-19 14:34 ` Dave Gordon
2015-06-18 18:54 ` Dave Gordon
2015-06-15 18:36 ` [PATCH 06/15] drm/i915: Debugfs interface to read GuC load status Dave Gordon
2015-06-16 9:40 ` Chris Wilson
2015-06-19 7:49 ` Dave Gordon
2015-06-15 18:36 ` [PATCH 07/15] drm/i915: Defer default hardware context initialisation until first open Dave Gordon
2015-06-16 9:35 ` Chris Wilson
2015-06-19 9:42 ` Dave Gordon
2015-06-17 12:18 ` Daniel Vetter
2015-06-19 9:19 ` Dave Gordon
2015-06-24 10:15 ` Daniel Vetter
2015-06-15 18:36 ` [PATCH 08/15] drm/i915: Move execlists defines from .c to .h Dave Gordon
2015-06-16 9:37 ` Chris Wilson
2015-06-17 7:31 ` Dave Gordon
2015-06-17 7:54 ` Chris Wilson
2015-06-17 7:59 ` Chris Wilson
2015-06-22 13:05 ` Dave Gordon
2015-06-15 18:36 ` [PATCH 09/15] drm/i915: GuC submission setup, phase 1 Dave Gordon
2015-06-15 21:32 ` Chris Wilson
2015-06-19 17:02 ` Dave Gordon
2015-06-19 17:22 ` Dave Gordon
2015-06-16 11:44 ` Chris Wilson
2015-06-15 18:36 ` [PATCH 10/15] drm/i915: Enable GuC firmware log Dave Gordon
2015-06-15 21:40 ` Chris Wilson
2015-06-16 9:26 ` Tvrtko Ursulin
2015-06-16 11:40 ` Chris Wilson
2015-06-16 12:29 ` Tvrtko Ursulin
2015-06-15 18:36 ` [PATCH 11/15] drm/i915: Implementation of GuC client Dave Gordon
2015-06-15 21:55 ` Chris Wilson
2015-06-19 17:55 ` Dave Gordon
2015-06-15 18:36 ` [PATCH 12/15] drm/i915: Interrupt routing for GuC submission Dave Gordon
2015-06-16 9:24 ` Chris Wilson
2015-06-17 8:20 ` Dave Gordon
2015-06-17 12:22 ` Daniel Vetter
2015-06-17 12:41 ` Daniel Vetter
2015-06-23 11:33 ` Dave Gordon
2015-06-23 23:48 ` Yu Dai
2015-06-24 10:02 ` Daniel Vetter
2015-06-15 18:36 ` [PATCH 13/15] drm/i915: Integrate GuC-based command submission Dave Gordon
2015-06-16 9:22 ` Chris Wilson
2015-06-19 18:18 ` Dave Gordon
2015-06-15 18:36 ` [PATCH 14/15] drm/i915: Debugfs interface for GuC submission statistics Dave Gordon
2015-06-16 9:28 ` Chris Wilson
2015-06-24 8:27 ` Dave Gordon
2015-06-15 18:36 ` [PATCH 15/15] Documentation/drm: kerneldoc for GuC Dave Gordon
2015-06-15 18:36 ` [PATCH 16/15] drm/i915: Enable GuC submission, where supported Dave Gordon
2015-06-17 12:43 ` [PATCH 00/15] Batch submission via GuC Daniel Vetter
2015-06-25 7:23 ` Dave Gordon
2015-06-25 8:05 ` Chris Wilson
2015-06-24 12:16 ` Daniel Vetter
2015-06-24 12:57 ` Chris Wilson
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