[PATCH v6 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround

Arun Siluvery
2015-06-19T17:41:33Z

In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0d350f6..62c7eeb 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1139,8 +1139,8 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
{
uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);

- /* FIXME: Replace me with WA */
- wa_ctx_emit(batch, MI_NOOP);
+ /* WaDisableCtxRestoreArbitration:bdw,chv */
+ wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_DISABLE);

/* Pad to end of cacheline */
while (index % CACHELINE_DWORDS)
@@ -1178,6 +1178,9 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
{
uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);

+ /* WaDisableCtxRestoreArbitration:bdw,chv */
+ wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_ENABLE);
+
wa_ctx_emit(batch, MI_BATCH_BUFFER_END);

return wa_ctx_end(wa_ctx, *offset = index, 1);
--
2.3.0