From: "Jindal, Sonika" <sonika.jindal@intel.com>
To: Imre Deak <imre.deak@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 3/5] drm/i915/bxt: add PLL10 to the PLL state dumper
Date: Wed, 24 Jun 2015 16:10:26 +0530 [thread overview]
Message-ID: <558A891A.7030909@intel.com> (raw)
In-Reply-To: <1434637557-4856-3-git-send-email-imre.deak@intel.com>
Looks good to me:
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
On 6/18/2015 7:55 PM, Imre Deak wrote:
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6f79680..0e5c613 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11907,7 +11907,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
> if (IS_BROXTON(dev)) {
> DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: ebb0: 0x%x, ebb4: 0x%x,"
> "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
> - "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pcsdw12: 0x%x\n",
> + "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pll10: 0x%x, pcsdw12: 0x%x\n",
> pipe_config->ddi_pll_sel,
> pipe_config->dpll_hw_state.ebb0,
> pipe_config->dpll_hw_state.ebb4,
> @@ -11918,6 +11918,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
> pipe_config->dpll_hw_state.pll6,
> pipe_config->dpll_hw_state.pll8,
> pipe_config->dpll_hw_state.pll9,
> + pipe_config->dpll_hw_state.pll10,
> pipe_config->dpll_hw_state.pcsdw12);
> } else if (IS_SKYLAKE(dev)) {
> DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: "
>
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next prev parent reply other threads:[~2015-06-24 10:40 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-18 14:25 [PATCH 1/5] drm/i915/bxt: mask off the DPLL state checker bits we don't program Imre Deak
2015-06-18 14:25 ` [PATCH 2/5] drm/i915/bxt: add missing DDI PLL registers to the state checking Imre Deak
2015-06-24 10:07 ` Jindal, Sonika
2015-06-24 10:19 ` Imre Deak
2015-06-24 10:39 ` Daniel Vetter
2015-06-24 10:39 ` Jindal, Sonika
2015-06-18 14:25 ` [PATCH 3/5] drm/i915/bxt: add PLL10 to the PLL state dumper Imre Deak
2015-06-24 10:40 ` Jindal, Sonika [this message]
2015-06-18 14:25 ` [PATCH 4/5] drm/i915/vlv: factor out vlv_calc_port_clock Imre Deak
2015-06-22 13:33 ` Ville Syrjälä
2015-06-22 13:52 ` Imre Deak
2015-06-22 20:35 ` [PATCH v2 4/5] drm/i915/vlv: move the vlv PLL helper next to its platform counterparts Imre Deak
2015-06-30 3:13 ` Jindal, Sonika
2015-06-22 20:35 ` [PATCH v2 4.1/5] drm/i915: calculate the port clock rate along with other PLL params Imre Deak
2015-06-24 12:53 ` Ville Syrjälä
2015-06-30 9:56 ` Daniel Vetter
2015-06-24 10:16 ` [PATCH 4/5] drm/i915/vlv: factor out vlv_calc_port_clock Jindal, Sonika
2015-06-24 10:20 ` Imre Deak
2015-06-18 14:25 ` [PATCH 5/5] drm/i915/bxt: add DDI port HW readout support Imre Deak
2015-06-22 13:44 ` Ville Syrjälä
2015-06-22 14:22 ` Imre Deak
2015-06-22 14:40 ` Ville Syrjälä
2015-06-22 20:35 ` [PATCH v2 " Imre Deak
2015-06-24 10:40 ` [PATCH 1/5] drm/i915/bxt: mask off the DPLL state checker bits we don't program Jindal, Sonika
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