Re: [PATCH v2 12/20] drm/i915: skip modeset if compatible, and enable fastboot for everyone, v2.

Daniel Vetter
2015-07-07T10:11:59Z

On Tue, Jul 07, 2015 at 09:08:23AM +0200, Maarten Lankhorst wrote:
> @@ -12331,7 +12337,6 @@ static bool intel_fuzzy_clock_check(int clock1, int clock2)
> base.head) \
> if (mask & (1 <<(intel_crtc)->pipe))
>
> -
> static bool
> intel_compare_m_n(unsigned int m, unsigned int n,
> unsigned int m2, unsigned int n2)
> @@ -12553,18 +12558,21 @@ intel_pipe_config_compare(struct drm_device *dev,
> * Proper atomic modesets with recomputed global state will fix this.
> * Until then just don't check gmch state for inherited modes.
> */
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) {
> - PIPE_CONF_CHECK_I(gmch_pfit.control);
> - /* pfit ratios are autocomputed by the hw on gen4+ */
> - if (INTEL_INFO(dev)->gen < 4)
> - PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
> - PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
> - }
> + if (!adjust) {
> + PIPE_CONF_CHECK_I(pipe_src_w);
> + PIPE_CONF_CHECK_I(pipe_src_h);
>
> - PIPE_CONF_CHECK_I(pch_pfit.enabled);
> - if (current_config->pch_pfit.enabled) {
> - PIPE_CONF_CHECK_I(pch_pfit.pos);
> - PIPE_CONF_CHECK_I(pch_pfit.size);
> + PIPE_CONF_CHECK_I(pch_pfit.enabled);
> + if (current_config->pch_pfit.enabled) {
> + PIPE_CONF_CHECK_I(pch_pfit.pos);
> + PIPE_CONF_CHECK_I(pch_pfit.size);
> +
> + PIPE_CONF_CHECK_I(gmch_pfit.control);
> + /* pfit ratios are autocomputed by the hw on gen4+ */
> + if (INTEL_INFO(dev)->gen < 4)
> + PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
> + PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
> + }
> }

The above hunk should be indenpendent of fastboot changes, it only
requires us to recompute the pipe config for all crtcs in an update. And
we do that now: When we steal an encoder we add the crtc that encoder was
on, and then also recompute it's config.

Can you please split this out and submit as its own patch. And please
remove the comment too since there's no conditional check any more now.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation