From: "Goel, Akash" <akash.goel@intel.com>
To: Michel Thierry <michel.thierry@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 11/17] drm/i915: Expand error state's address width to 64b
Date: Tue, 7 Jul 2015 18:23:16 +0530 [thread overview]
Message-ID: <559BCBBC.9080002@intel.com> (raw)
In-Reply-To: <1435764453-11954-12-git-send-email-michel.thierry@intel.com>
On 7/1/2015 8:57 PM, Michel Thierry wrote:
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 4 ++--
> drivers/gpu/drm/i915/i915_gpu_error.c | 17 +++++++++--------
> 2 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7bccfd5..d245c82 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -546,7 +546,7 @@ struct drm_i915_error_state {
>
> struct drm_i915_error_object {
> int page_count;
> - u32 gtt_offset;
> + u64 gtt_offset;
> u32 *pages[0];
> } *ringbuffer, *batchbuffer, *wa_batchbuffer, *ctx, *hws_page;
>
> @@ -572,7 +572,7 @@ struct drm_i915_error_state {
> u32 size;
> u32 name;
> u32 rseqno[I915_NUM_RINGS], wseqno;
> - u32 gtt_offset;
> + u64 gtt_offset;
> u32 read_domains;
> u32 write_domain;
> s32 fence_reg:I915_MAX_NUM_FENCE_BITS;
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 6f42569..cdbd4c2 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -197,7 +197,7 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
> err_printf(m, " %s [%d]:\n", name, count);
>
> while (count--) {
> - err_printf(m, " %08x %8u %02x %02x [ ",
> + err_printf(m, " %016llx %8u %02x %02x [ ",
> err->gtt_offset,
> err->size,
> err->read_domains,
> @@ -426,7 +426,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> err_printf(m, " (submitted by %s [%d])",
> error->ring[i].comm,
> error->ring[i].pid);
> - err_printf(m, " --- gtt_offset = 0x%08x\n",
> + err_printf(m, " --- gtt_offset = 0x%016llx\n",
> obj->gtt_offset);
> print_error_obj(m, obj);
> }
> @@ -434,7 +434,8 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> obj = error->ring[i].wa_batchbuffer;
> if (obj) {
> err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
> - dev_priv->ring[i].name, obj->gtt_offset);
> + dev_priv->ring[i].name,
> + lower_32_bits(obj->gtt_offset));
> print_error_obj(m, obj);
> }
>
> @@ -453,14 +454,14 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> if ((obj = error->ring[i].ringbuffer)) {
> err_printf(m, "%s --- ringbuffer = 0x%08x\n",
> dev_priv->ring[i].name,
> - obj->gtt_offset);
> + lower_32_bits(obj->gtt_offset));
> print_error_obj(m, obj);
> }
>
> if ((obj = error->ring[i].hws_page)) {
> err_printf(m, "%s --- HW Status = 0x%08x\n",
> dev_priv->ring[i].name,
> - obj->gtt_offset);
> + lower_32_bits(obj->gtt_offset));
> offset = 0;
> for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
> err_printf(m, "[%04x] %08x %08x %08x %08x\n",
> @@ -476,13 +477,13 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
> if ((obj = error->ring[i].ctx)) {
> err_printf(m, "%s --- HW Context = 0x%08x\n",
> dev_priv->ring[i].name,
> - obj->gtt_offset);
> + lower_32_bits(obj->gtt_offset));
> print_error_obj(m, obj);
> }
> }
>
> if ((obj = error->semaphore_obj)) {
> - err_printf(m, "Semaphore page = 0x%08x\n", obj->gtt_offset);
> + err_printf(m, "Semaphore page = 0x%016llx\n", obj->gtt_offset);
Can the 'lower_32_bits' be used for the semaphore object also. Its
mapped into GGTT during ring init time, so may not have an offset > 4GB.
> for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
> err_printf(m, "[%04x] %08x %08x %08x %08x\n",
> elt * 4,
> @@ -590,7 +591,7 @@ i915_error_object_create(struct drm_i915_private *dev_priv,
> int num_pages;
> bool use_ggtt;
> int i = 0;
> - u32 reloc_offset;
> + u64 reloc_offset;
>
> if (src == NULL || src->pages == NULL)
> return NULL;
>
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next prev parent reply other threads:[~2015-07-07 12:53 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-10 16:46 [PATCH v2 00/18] 48-bit PPGTT Michel Thierry
2015-06-10 16:46 ` [PATCH v2 01/18] drm/i915/lrc: Update PDPx registers with lri commands Michel Thierry
2015-06-11 18:04 ` Mika Kuoppala
2015-06-22 9:18 ` Michel Thierry
2015-06-26 12:46 ` [PATCH v3] " Michel Thierry
2015-06-26 14:45 ` Mika Kuoppala
2015-06-10 16:46 ` [PATCH v2 02/18] drm/i915/gtt: Switch gen8_free_page_tables params Michel Thierry
2015-06-11 18:05 ` Mika Kuoppala
2015-06-26 16:38 ` Daniel Vetter
2015-06-10 16:46 ` [PATCH v2 03/18] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-06-10 16:46 ` [PATCH v2 04/18] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-06-10 16:46 ` [PATCH v2 05/18] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-06-10 16:46 ` [PATCH v2 06/18] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-06-10 16:46 ` [PATCH v2 07/18] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-06-10 16:46 ` [PATCH v2 08/18] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-06-10 16:46 ` [PATCH v2 09/18] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-06-10 16:46 ` [PATCH v2 10/18] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-06-10 16:46 ` [PATCH v2 11/18] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-06-10 16:46 ` [PATCH v2 12/18] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-06-10 16:46 ` [PATCH v2 13/18] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-06-10 16:46 ` [PATCH v2 14/18] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-06-10 16:46 ` [PATCH v2 15/18] drm/i915: object size needs to be u64 Michel Thierry
2015-06-10 16:46 ` [PATCH v2 16/18] drm/i915: Check against correct user_size limit in 48b ppgtt mode Michel Thierry
2015-06-10 17:57 ` Chris Wilson
2015-06-10 16:46 ` [PATCH v2 17/18] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-06-10 18:09 ` Chris Wilson
2015-06-17 12:49 ` Daniel Vetter
2015-06-17 12:53 ` Chris Wilson
2015-06-17 15:03 ` Daniel Vetter
2015-06-17 17:37 ` Chris Wilson
2015-06-18 6:45 ` Daniel Vetter
2015-06-18 7:03 ` Chris Wilson
2015-06-18 7:11 ` Daniel Vetter
2015-06-18 7:34 ` Chris Wilson
2015-06-23 12:21 ` [PATCH v3] " Michel Thierry
2015-06-23 13:22 ` Chris Wilson
2015-06-10 16:46 ` [PATCH v2 18/18] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-06-10 16:46 ` [PATCH v2] tests/gem_ppgtt: Check Wa32bitOffsets workarounds Michel Thierry
2015-07-01 15:27 ` [PATCH v3 00/17] 48-bit PPGTT Michel Thierry
2015-07-01 15:27 ` [PATCH v3 01/17] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-07-01 15:27 ` [PATCH v3 02/17] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-07-07 12:36 ` Goel, Akash
2015-07-07 12:56 ` Michel Thierry
2015-07-01 15:27 ` [PATCH v3 03/17] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-07-07 12:43 ` Goel, Akash
2015-07-07 13:35 ` Michel Thierry
2015-07-01 15:27 ` [PATCH v3 04/17] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-07-01 15:27 ` [PATCH v3 05/17] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-07-07 12:48 ` Goel, Akash
2015-07-07 13:40 ` Michel Thierry
2015-07-01 15:27 ` [PATCH v3 06/17] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-07-01 15:27 ` [PATCH v3 07/17] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-07-01 15:27 ` [PATCH v3 08/17] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-07-01 15:27 ` [PATCH v3 09/17] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-07-07 12:51 ` Goel, Akash
2015-07-07 13:42 ` Michel Thierry
2015-07-01 15:27 ` [PATCH v3 10/17] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-07-01 15:27 ` [PATCH v3 11/17] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-07-07 12:53 ` Goel, Akash [this message]
2015-07-07 13:50 ` Michel Thierry
2015-07-01 15:27 ` [PATCH v3 12/17] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-07-07 12:56 ` Goel, Akash
2015-07-07 13:51 ` Michel Thierry
2015-07-01 15:27 ` [PATCH v3 13/17] drm/i915: object size needs to be u64 Michel Thierry
2015-07-01 15:27 ` [PATCH v3 14/17] drm/i915: batch_obj vm offset must " Michel Thierry
2015-07-01 16:07 ` John Harrison
2015-07-01 15:27 ` [PATCH v3 15/17] drm/i915/userptr: Kill user_size limit check Michel Thierry
2015-07-01 15:31 ` Chris Wilson
2015-07-01 15:27 ` [PATCH v3 16/17] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-07-01 15:43 ` Chris Wilson
2015-07-01 15:54 ` Michel Thierry
2015-07-01 16:02 ` [PATCH v5] " Michel Thierry
2015-07-01 15:27 ` [PATCH v3 17/17] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-07-01 15:38 ` [PATCH v3 00/17] 48-bit PPGTT Daniel Vetter
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