From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sivakumar Thulasimani Subject: Re: [PATCH 3/3] drm/i915/bxt: add support for HPD long/short pulse detection on HPD_PORT_A pin Date: Wed, 22 Jul 2015 14:01:00 +0530 Message-ID: <55AF54C4.7060300@intel.com> References: <1437428619-30160-1-git-send-email-imre.deak@intel.com> <1437428619-30160-4-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0744748188==" Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 8F7796EAD1 for ; Wed, 22 Jul 2015 01:31:02 -0700 (PDT) In-Reply-To: <1437428619-30160-4-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org This is a multi-part message in MIME format. --===============0744748188== Content-Type: multipart/alternative; boundary="------------080002080109080906090703" This is a multi-part message in MIME format. --------------080002080109080906090703 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit On 7/21/2015 3:13 AM, Imre Deak wrote: > This is a requirement for enabling display port HPD support on the port > A HPD pin. This support is to be added by follow-up patches. > > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++++++++++- > drivers/gpu/drm/i915/i915_reg.h | 5 +++++ > 2 files changed, 22 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 4ad7a31..02b9e73 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -1227,6 +1227,22 @@ static irqreturn_t gen8_gt_irq_handler(struct drm_i915_private *dev_priv, > return ret; > } > > +static bool bxt_port_hotplug_long_detect(enum port port, u32 val) > +{ > + switch (port) { > + case PORT_A: > + return val & BXT_PORTA_HOTPLUG_LONG_DETECT; > + case PORT_B: > + return val & PORTB_HOTPLUG_LONG_DETECT; > + case PORT_C: > + return val & PORTC_HOTPLUG_LONG_DETECT; > + case PORT_D: > + return val & PORTD_HOTPLUG_LONG_DETECT; > + default: > + return false; > + } > +} > + > static bool pch_port_hotplug_long_detect(enum port port, u32 val) > { > switch (port) { > @@ -1961,7 +1977,7 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status) > I915_WRITE(BXT_HOTPLUG_CTL, hp_control); > > intel_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control, > - hpd_bxt, pch_port_hotplug_long_detect); > + hpd_bxt, bxt_port_hotplug_long_detect); > intel_hpd_irq_handler(dev, pin_mask, long_mask); > } > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index fc70035..be166b3 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5942,6 +5942,11 @@ enum skl_disp_power_wells { > > /* digital port hotplug */ > #define PCH_PORT_HOTPLUG 0xc4030 /* SHOTPLUG_CTL */ > +#define BXT_PORTA_HOTPLUG_ENABLE (1 << 28) > +#define BXT_PORTA_HOTPLUG_STATUS_MASK (0x3 << 24) > +#define BXT_PORTA_HOTPLUG_NO_DETECT (0 << 24) > +#define BXT_PORTA_HOTPLUG_SHORT_DETECT (1 << 24) > +#define BXT_PORTA_HOTPLUG_LONG_DETECT (2 << 24) > #define PORTD_HOTPLUG_ENABLE (1 << 20) > #define PORTD_PULSE_DURATION_2ms (0) > #define PORTD_PULSE_DURATION_4_5ms (1 << 18) Reviewed-by: Sivakumar Thulasimani -- regards, Sivakumar --------------080002080109080906090703 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 7bit

On 7/21/2015 3:13 AM, Imre Deak wrote:
This is a requirement for enabling display port HPD support on the port
A HPD pin. This support is to be added by follow-up patches.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++++++++++-
 drivers/gpu/drm/i915/i915_reg.h |  5 +++++
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4ad7a31..02b9e73 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1227,6 +1227,22 @@ static irqreturn_t gen8_gt_irq_handler(struct drm_i915_private *dev_priv,
 	return ret;
 }
 
+static bool bxt_port_hotplug_long_detect(enum port port, u32 val)
+{
+	switch (port) {
+	case PORT_A:
+		return val & BXT_PORTA_HOTPLUG_LONG_DETECT;
+	case PORT_B:
+		return val & PORTB_HOTPLUG_LONG_DETECT;
+	case PORT_C:
+		return val & PORTC_HOTPLUG_LONG_DETECT;
+	case PORT_D:
+		return val & PORTD_HOTPLUG_LONG_DETECT;
+	default:
+		return false;
+	}
+}
+
 static bool pch_port_hotplug_long_detect(enum port port, u32 val)
 {
 	switch (port) {
@@ -1961,7 +1977,7 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
 	I915_WRITE(BXT_HOTPLUG_CTL, hp_control);
 
 	intel_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control,
-			   hpd_bxt, pch_port_hotplug_long_detect);
+			   hpd_bxt, bxt_port_hotplug_long_detect);
 	intel_hpd_irq_handler(dev, pin_mask, long_mask);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fc70035..be166b3 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5942,6 +5942,11 @@ enum skl_disp_power_wells {
 
 /* digital port hotplug */
 #define PCH_PORT_HOTPLUG        0xc4030		/* SHOTPLUG_CTL */
+#define BXT_PORTA_HOTPLUG_ENABLE	(1 << 28)
+#define BXT_PORTA_HOTPLUG_STATUS_MASK	(0x3 << 24)
+#define  BXT_PORTA_HOTPLUG_NO_DETECT	(0 << 24)
+#define  BXT_PORTA_HOTPLUG_SHORT_DETECT	(1 << 24)
+#define  BXT_PORTA_HOTPLUG_LONG_DETECT	(2 << 24)
 #define PORTD_HOTPLUG_ENABLE            (1 << 20)
 #define PORTD_PULSE_DURATION_2ms        (0)
 #define PORTD_PULSE_DURATION_4_5ms      (1 << 18)

Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>

-- 
regards,
Sivakumar
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