From: Michel Thierry <michel.thierry@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
intel-gfx@lists.freedesktop.org, akash.goel@intel.com
Subject: Re: [PATCH v5 17/19] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset
Date: Wed, 29 Jul 2015 12:05:55 +0100 [thread overview]
Message-ID: <55B8B393.4060709@intel.com> (raw)
In-Reply-To: <20150728144315.GD16528@nuc-i3427.alporthouse.com>
On 7/28/2015 3:43 PM, Chris Wilson wrote:
> On Tue, Jul 28, 2015 at 12:12:11PM +0100, Michel Thierry wrote:
>> On 7/27/2015 10:11 PM, Chris Wilson wrote:
>>> On Thu, Jul 16, 2015 at 10:33:29AM +0100, Michel Thierry wrote:
>>>> + if (!(entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
>>>> + (vma->node.start + vma->node.size) >= (1ULL << 32))
>>>> + return true;
>>>
>>> gcc completely screwed this up here and used 0 for 1ULL<<32.
>>>
>>> Note that we can allow state + size == 4G (since the end is exclusive),
>>> so I went with
>>>
>>> if ((entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) == 0 &&
>>> (vma->node.start + vma->node.size - 1) >> 32)
>>> return true;
>>>
>>> instead.
>>> -Chris
>>>
>>
>> Thanks, I'll include this change in the next patch version.
>
> I've also got a couple of other stylistic changes, plus an earlier
> request:
> ...
I updated my patch with these changes, thanks.
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 209e8e2b07be..78fc8810d6e0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -680,8 +680,8 @@ eb_vma_misplaced(struct i915_vma *vma)
> if (entry->flags & __EXEC_OBJECT_NEEDS_MAP && !obj->map_and_fenceable)
> return !only_mappable_for_reloc(entry->flags);
>
> - if (!(entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
> - (vma->node.start + vma->node.size) >= (1ULL << 32))
> + if ((entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) == 0 &&
> + (vma->node.start + vma->node.size - 1) >> 32)
> return true;
>
> return false;
>
Also updated this part to follow your suggestion.
I also spent a bit more time trying to figure what gcc was doing here.
But I can't reproduce it locally, I get sizeof(1ULL<<32) = 8 and
1ULL<<32 doesn't seem to be zero (in 32 and 64 bit kernels).
Could it be related to the gcc version? I'm using 4.8.4.
-Michel
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next prev parent reply other threads:[~2015-07-29 11:05 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-16 9:33 [PATCH v5 00/19] 48-bit PPGTT Michel Thierry
2015-07-16 9:33 ` [PATCH v5 01/19] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-07-16 9:33 ` [PATCH v5 02/19] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-07-16 9:33 ` [PATCH v5 03/19] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-07-16 9:33 ` [PATCH v5 04/19] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-07-16 9:33 ` [PATCH v5 05/19] drm/i915/gen8: Add PML4 structure Michel Thierry
2015-07-16 9:33 ` [PATCH v5 06/19] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-07-29 14:34 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 07/19] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-07-29 14:34 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 08/19] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-07-29 14:35 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 09/19] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-07-16 9:33 ` [PATCH v5 10/19] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-07-16 9:33 ` [PATCH v5 11/19] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-07-29 14:35 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 12/19] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-07-16 9:33 ` [PATCH v5 13/19] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-07-16 9:33 ` [PATCH v5 14/19] drm/i915: object size needs to be u64 Michel Thierry
2015-07-16 9:33 ` [PATCH v5 15/19] drm/i915: batch_obj vm offset must " Michel Thierry
2015-07-16 9:33 ` [PATCH v5 16/19] drm/i915/userptr: Kill user_size limit check Michel Thierry
2015-07-16 9:33 ` [PATCH v5 17/19] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-07-27 14:34 ` Goel, Akash
2015-07-27 14:46 ` Chris Wilson
2015-07-27 14:53 ` Michel Thierry
2015-07-27 21:11 ` Chris Wilson
2015-07-28 11:12 ` Michel Thierry
2015-07-28 14:43 ` Chris Wilson
2015-07-29 11:05 ` Michel Thierry [this message]
2015-07-29 11:17 ` Chris Wilson
2015-07-16 9:33 ` [PATCH v5 18/19] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-07-16 9:33 ` [PATCH v5 19/19] drm/i915: Save some page table setup on repeated binds Michel Thierry
2015-07-28 12:18 ` [PATCH v5 00/19] 48-bit PPGTT Chris Wilson
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