* [PATCH] drm/i915: read bpp from vbt only for older panels
@ 2015-07-30 8:34 Sivakumar Thulasimani
2015-07-30 9:57 ` Jani Nikula
0 siblings, 1 reply; 5+ messages in thread
From: Sivakumar Thulasimani @ 2015-07-30 8:34 UTC (permalink / raw)
To: intel-gfx
From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
BPP bits defined in VBT should be used only on panels whose
edid version is 1.3 or older. EDID version 1.4 introduced offsets
where bpp is defined and hence should be preferred over any value
programmed in VBT.
Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 44f8a32..898dc74 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -132,6 +132,7 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp);
static void vlv_steal_power_sequencer(struct drm_device *dev,
enum pipe pipe);
+static struct edid * intel_dp_get_edid(struct intel_dp *intel_dp);
static int
intel_dp_max_link_bw(struct intel_dp *intel_dp)
@@ -1353,6 +1354,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
enum port port = dp_to_dig_port(intel_dp)->port;
struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
struct intel_connector *intel_connector = intel_dp->attached_connector;
+ struct edid *edid = NULL;
int lane_count, clock;
int min_lane_count = 1;
int max_lane_count = intel_dp_max_lane_count(intel_dp);
@@ -1409,12 +1411,19 @@ intel_dp_compute_config(struct intel_encoder *encoder,
* bpc in between. */
bpp = pipe_config->pipe_bpp;
if (is_edp(intel_dp)) {
- if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) {
+ edid = intel_dp_get_edid(intel_dp);
+
+ /* Get bpp from vbt only for panels with edid 1.3 or older */
+ if (edid && edid->version == 1 && edid->revision <= 3 &&
+ (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp)) {
DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",
dev_priv->vbt.edp_bpp);
bpp = dev_priv->vbt.edp_bpp;
}
+ if (edid)
+ kfree(edid);
+
/*
* Use the maximum clock and number of lanes the eDP panel
* advertizes being capable of. The panels are generally
--
1.7.9.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: read bpp from vbt only for older panels
2015-07-30 8:34 [PATCH] drm/i915: read bpp from vbt only for older panels Sivakumar Thulasimani
@ 2015-07-30 9:57 ` Jani Nikula
2015-07-30 10:23 ` Sivakumar Thulasimani
0 siblings, 1 reply; 5+ messages in thread
From: Jani Nikula @ 2015-07-30 9:57 UTC (permalink / raw)
To: Sivakumar Thulasimani, intel-gfx
On Thu, 30 Jul 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>
> BPP bits defined in VBT should be used only on panels whose
> edid version is 1.3 or older. EDID version 1.4 introduced offsets
> where bpp is defined and hence should be preferred over any value
> programmed in VBT.
Should we actually look at the EDID bpp somewhere?
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 44f8a32..898dc74 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -132,6 +132,7 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
> static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp);
> static void vlv_steal_power_sequencer(struct drm_device *dev,
> enum pipe pipe);
> +static struct edid * intel_dp_get_edid(struct intel_dp *intel_dp);
>
> static int
> intel_dp_max_link_bw(struct intel_dp *intel_dp)
> @@ -1353,6 +1354,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> enum port port = dp_to_dig_port(intel_dp)->port;
> struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
> struct intel_connector *intel_connector = intel_dp->attached_connector;
> + struct edid *edid = NULL;
> int lane_count, clock;
> int min_lane_count = 1;
> int max_lane_count = intel_dp_max_lane_count(intel_dp);
> @@ -1409,12 +1411,19 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> * bpc in between. */
> bpp = pipe_config->pipe_bpp;
> if (is_edp(intel_dp)) {
> - if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) {
> + edid = intel_dp_get_edid(intel_dp);
> +
> + /* Get bpp from vbt only for panels with edid 1.3 or older */
> + if (edid && edid->version == 1 && edid->revision <= 3 &&
> + (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp)) {
Now you require the panel to have an EDID in order to use the bpp in
VBT.
BR,
Jani.
> DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",
> dev_priv->vbt.edp_bpp);
> bpp = dev_priv->vbt.edp_bpp;
> }
>
> + if (edid)
> + kfree(edid);
> +
> /*
> * Use the maximum clock and number of lanes the eDP panel
> * advertizes being capable of. The panels are generally
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: read bpp from vbt only for older panels
2015-07-30 9:57 ` Jani Nikula
@ 2015-07-30 10:23 ` Sivakumar Thulasimani
0 siblings, 0 replies; 5+ messages in thread
From: Sivakumar Thulasimani @ 2015-07-30 10:23 UTC (permalink / raw)
To: Jani Nikula, intel-gfx
On 7/30/2015 3:27 PM, Jani Nikula wrote:
> On Thu, 30 Jul 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
>> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>>
>> BPP bits defined in VBT should be used only on panels whose
>> edid version is 1.3 or older. EDID version 1.4 introduced offsets
>> where bpp is defined and hence should be preferred over any value
>> programmed in VBT.
> Should we actually look at the EDID bpp somewhere?
>> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_dp.c | 11 ++++++++++-
>> 1 file changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 44f8a32..898dc74 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -132,6 +132,7 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
>> static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp);
>> static void vlv_steal_power_sequencer(struct drm_device *dev,
>> enum pipe pipe);
>> +static struct edid * intel_dp_get_edid(struct intel_dp *intel_dp);
>>
>> static int
>> intel_dp_max_link_bw(struct intel_dp *intel_dp)
>> @@ -1353,6 +1354,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>> enum port port = dp_to_dig_port(intel_dp)->port;
>> struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
>> struct intel_connector *intel_connector = intel_dp->attached_connector;
>> + struct edid *edid = NULL;
>> int lane_count, clock;
>> int min_lane_count = 1;
>> int max_lane_count = intel_dp_max_lane_count(intel_dp);
>> @@ -1409,12 +1411,19 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>> * bpc in between. */
>> bpp = pipe_config->pipe_bpp;
>> if (is_edp(intel_dp)) {
>> - if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) {
>> + edid = intel_dp_get_edid(intel_dp);
>> +
>> + /* Get bpp from vbt only for panels with edid 1.3 or older */
>> + if (edid && edid->version == 1 && edid->revision <= 3 &&
>> + (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp)) {
> Now you require the panel to have an EDID in order to use the bpp in
> VBT.
>
> BR,
> Jani.
will update with a new patch that will remove this expectation.
>> DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",
>> dev_priv->vbt.edp_bpp);
>> bpp = dev_priv->vbt.edp_bpp;
>> }
>>
>> + if (edid)
>> + kfree(edid);
>> +
>> /*
>> * Use the maximum clock and number of lanes the eDP panel
>> * advertizes being capable of. The panels are generally
>> --
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
regards,
Sivakumar
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] drm/i915: read bpp from vbt only for older panels
@ 2015-07-31 5:35 Sivakumar Thulasimani
2015-07-31 9:08 ` Jani Nikula
0 siblings, 1 reply; 5+ messages in thread
From: Sivakumar Thulasimani @ 2015-07-31 5:35 UTC (permalink / raw)
To: jani.nikula, intel-gfx
From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
BPP bits defined in VBT should be used only on panels whose
edid version is 1.3 or older. EDID version 1.4 introduced offsets
where bpp is defined and read into display_info, hence bpp from
VBT will be used only when bpc in display_info is zero.
v2: use display_info.bpc for deciding when to use vbt_bpp (Jani)
Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 44f8a32..ae00e86 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1409,7 +1409,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
* bpc in between. */
bpp = pipe_config->pipe_bpp;
if (is_edp(intel_dp)) {
- if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) {
+
+ /* Get bpp from vbt only for panels that dont have bpp in edid */
+ if (intel_connector->base.display_info.bpc == 0 &&
+ (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp)) {
DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",
dev_priv->vbt.edp_bpp);
bpp = dev_priv->vbt.edp_bpp;
--
1.7.9.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: read bpp from vbt only for older panels
2015-07-31 5:35 Sivakumar Thulasimani
@ 2015-07-31 9:08 ` Jani Nikula
0 siblings, 0 replies; 5+ messages in thread
From: Jani Nikula @ 2015-07-31 9:08 UTC (permalink / raw)
To: Sivakumar Thulasimani, intel-gfx
On Fri, 31 Jul 2015, Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> wrote:
> From: "Thulasimani,Sivakumar" <sivakumar.thulasimani@intel.com>
>
> BPP bits defined in VBT should be used only on panels whose
> edid version is 1.3 or older. EDID version 1.4 introduced offsets
> where bpp is defined and read into display_info, hence bpp from
> VBT will be used only when bpc in display_info is zero.
>
> v2: use display_info.bpc for deciding when to use vbt_bpp (Jani)
>
> Signed-off-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 44f8a32..ae00e86 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1409,7 +1409,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> * bpc in between. */
> bpp = pipe_config->pipe_bpp;
> if (is_edp(intel_dp)) {
> - if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) {
> +
> + /* Get bpp from vbt only for panels that dont have bpp in edid */
> + if (intel_connector->base.display_info.bpc == 0 &&
> + (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp)) {
The indentation seems wrong here, otherwise
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",
> dev_priv->vbt.edp_bpp);
> bpp = dev_priv->vbt.edp_bpp;
> --
> 1.7.9.5
>
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
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