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* [PATCH] drm/i915: disable_shared_pll doesn't work on pre-gen5
@ 2015-08-03 20:09 Jesse Barnes
  2015-08-04  8:24 ` Maarten Lankhorst
  2015-08-10 10:15 ` Chris Wilson
  0 siblings, 2 replies; 5+ messages in thread
From: Jesse Barnes @ 2015-08-03 20:09 UTC (permalink / raw)
  To: intel-gfx

Looks like

commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date:   Mon Jun 15 12:33:53 2015 +0200
    drm/i915: Update less state during modeset.

introduced the unconditional calling of disable_shared_dpll, but didn't
fix up pre-gen5 to avoid the BUG_ON at the top of the function.

So change the BUG_ON into a gen check (alternately we could move the
BUG_ON until later, since we shouldn't have a pll struct here either,
but this seems clearer to read).

This fixes a crash on load on my x200s platform.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 43b0f17..b5e79b3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1936,7 +1936,9 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
 	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
 
 	/* PCH only available on ILK+ */
-	BUG_ON(INTEL_INFO(dev)->gen < 5);
+	if (INTEL_INFO(dev)->gen < 5)
+		return;
+
 	if (pll == NULL)
 		return;
 
-- 
1.9.1

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^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-08-11  9:45 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-08-03 20:09 [PATCH] drm/i915: disable_shared_pll doesn't work on pre-gen5 Jesse Barnes
2015-08-04  8:24 ` Maarten Lankhorst
2015-08-10 10:15 ` Chris Wilson
2015-08-11  9:30   ` Daniel Vetter
2015-08-11  9:45     ` Chris Wilson

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