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* [PATCH] drm/i915: make CSR firmware messages less verbose
@ 2015-09-10 15:20 Jesse Barnes
  2015-09-10 15:29 ` Damien Lespiau
  2015-09-11  8:29 ` Chris Wilson
  0 siblings, 2 replies; 5+ messages in thread
From: Jesse Barnes @ 2015-09-10 15:20 UTC (permalink / raw)
  To: intel-gfx

Use WARN_ONCE in a bunch of places and demote a message that would
continually spam us.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_csr.c        | 12 +++++------
 drivers/gpu/drm/i915/intel_runtime_pm.c | 36 ++++++++++++++++-----------------
 2 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index ba1ae03..765dfcd 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev)
 
 void assert_csr_loaded(struct drm_i915_private *dev_priv)
 {
-	WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED,
-	     "CSR is not loaded.\n");
-	WARN(!I915_READ(CSR_PROGRAM_BASE),
-				"CSR program storage start is NULL\n");
-	WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
-	WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
+	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
+		  "CSR is not loaded.\n");
+	WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE),
+		  "CSR program storage start is NULL\n");
+	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
+	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
 }
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 3f682a1..85c35fd 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -463,14 +463,14 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
 	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
 					SKL_DISP_PW_2);
 
-	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
-	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
-	WARN(pg2_enabled, "PG2 not disabled to enable DC5.\n");
+	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
+	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
+	WARN_ONCE(pg2_enabled, "PG2 not disabled to enable DC5.\n");
 
-	WARN((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
-				"DC5 already programmed to be enabled.\n");
-	WARN(dev_priv->pm.suspended,
-		"DC5 cannot be enabled, if platform is runtime-suspended.\n");
+	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
+		  "DC5 already programmed to be enabled.\n");
+	WARN_ONCE(dev_priv->pm.suspended,
+		  "DC5 cannot be enabled, if platform is runtime-suspended.\n");
 
 	assert_csr_loaded(dev_priv);
 }
@@ -486,8 +486,8 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv)
 	if (dev_priv->power_domains.initializing)
 		return;
 
-	WARN(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
-	WARN(dev_priv->pm.suspended,
+	WARN_ONCE(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
+	WARN_ONCE(dev_priv->pm.suspended,
 		"Disabling of DC5 while platform is runtime-suspended should never happen.\n");
 }
 
@@ -526,12 +526,12 @@ static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
 {
 	struct drm_device *dev = dev_priv->dev;
 
-	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
-	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
-	WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
-		"Backlight is not disabled.\n");
-	WARN((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
-		"DC6 already programmed to be enabled.\n");
+	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
+	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
+	WARN_ONCE(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
+		  "Backlight is not disabled.\n");
+	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
+		  "DC6 already programmed to be enabled.\n");
 
 	assert_csr_loaded(dev_priv);
 }
@@ -546,8 +546,8 @@ static void assert_can_disable_dc6(struct drm_i915_private *dev_priv)
 		return;
 
 	assert_csr_loaded(dev_priv);
-	WARN(!(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
-		"DC6 already programmed to be disabled.\n");
+	WARN_ONCE(!(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
+		  "DC6 already programmed to be disabled.\n");
 }
 
 static void skl_enable_dc6(struct drm_i915_private *dev_priv)
@@ -670,7 +670,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
 				wait_for((state = intel_csr_load_status_get(dev_priv)) !=
 						FW_UNINITIALIZED, 1000);
 				if (state != FW_LOADED)
-					DRM_ERROR("CSR firmware not ready (%d)\n",
+					DRM_DEBUG("CSR firmware not ready (%d)\n",
 							state);
 				else
 					if (SKL_ENABLE_DC6(dev))
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: make CSR firmware messages less verbose
  2015-09-10 15:20 [PATCH] drm/i915: make CSR firmware messages less verbose Jesse Barnes
@ 2015-09-10 15:29 ` Damien Lespiau
  2015-09-11  8:29 ` Chris Wilson
  1 sibling, 0 replies; 5+ messages in thread
From: Damien Lespiau @ 2015-09-10 15:29 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: intel-gfx

On Thu, Sep 10, 2015 at 08:20:28AM -0700, Jesse Barnes wrote:
> Use WARN_ONCE in a bunch of places and demote a message that would
> continually spam us.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

I had something that could very well address the same problem(s):

  http://lists.freedesktop.org/archives/intel-gfx/2015-June/070093.html

and:

  https://bugs.freedesktop.org/show_bug.cgi?id=90461

But, WARN_ONCE() is not awful I guess:

Acked-by: Damien Lespiau <damien.lespiau@intel.com>

-- 
Damien

> ---
>  drivers/gpu/drm/i915/intel_csr.c        | 12 +++++------
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 36 ++++++++++++++++-----------------
>  2 files changed, 24 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index ba1ae03..765dfcd 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev)
>  
>  void assert_csr_loaded(struct drm_i915_private *dev_priv)
>  {
> -	WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> -	     "CSR is not loaded.\n");
> -	WARN(!I915_READ(CSR_PROGRAM_BASE),
> -				"CSR program storage start is NULL\n");
> -	WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
> -	WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> +	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> +		  "CSR is not loaded.\n");
> +	WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE),
> +		  "CSR program storage start is NULL\n");
> +	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
> +	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
>  }
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 3f682a1..85c35fd 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -463,14 +463,14 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
>  	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
>  					SKL_DISP_PW_2);
>  
> -	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
> -	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
> -	WARN(pg2_enabled, "PG2 not disabled to enable DC5.\n");
> +	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC5.\n");
> +	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
> +	WARN_ONCE(pg2_enabled, "PG2 not disabled to enable DC5.\n");
>  
> -	WARN((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
> -				"DC5 already programmed to be enabled.\n");
> -	WARN(dev_priv->pm.suspended,
> -		"DC5 cannot be enabled, if platform is runtime-suspended.\n");
> +	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
> +		  "DC5 already programmed to be enabled.\n");
> +	WARN_ONCE(dev_priv->pm.suspended,
> +		  "DC5 cannot be enabled, if platform is runtime-suspended.\n");
>  
>  	assert_csr_loaded(dev_priv);
>  }
> @@ -486,8 +486,8 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv)
>  	if (dev_priv->power_domains.initializing)
>  		return;
>  
> -	WARN(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
> -	WARN(dev_priv->pm.suspended,
> +	WARN_ONCE(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
> +	WARN_ONCE(dev_priv->pm.suspended,
>  		"Disabling of DC5 while platform is runtime-suspended should never happen.\n");
>  }
>  
> @@ -526,12 +526,12 @@ static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_device *dev = dev_priv->dev;
>  
> -	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
> -	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
> -	WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
> -		"Backlight is not disabled.\n");
> -	WARN((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
> -		"DC6 already programmed to be enabled.\n");
> +	WARN_ONCE(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
> +	WARN_ONCE(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
> +	WARN_ONCE(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
> +		  "Backlight is not disabled.\n");
> +	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
> +		  "DC6 already programmed to be enabled.\n");
>  
>  	assert_csr_loaded(dev_priv);
>  }
> @@ -546,8 +546,8 @@ static void assert_can_disable_dc6(struct drm_i915_private *dev_priv)
>  		return;
>  
>  	assert_csr_loaded(dev_priv);
> -	WARN(!(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
> -		"DC6 already programmed to be disabled.\n");
> +	WARN_ONCE(!(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC6),
> +		  "DC6 already programmed to be disabled.\n");
>  }
>  
>  static void skl_enable_dc6(struct drm_i915_private *dev_priv)
> @@ -670,7 +670,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
>  				wait_for((state = intel_csr_load_status_get(dev_priv)) !=
>  						FW_UNINITIALIZED, 1000);
>  				if (state != FW_LOADED)
> -					DRM_ERROR("CSR firmware not ready (%d)\n",
> +					DRM_DEBUG("CSR firmware not ready (%d)\n",
>  							state);
>  				else
>  					if (SKL_ENABLE_DC6(dev))
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: make CSR firmware messages less verbose
  2015-09-10 15:20 [PATCH] drm/i915: make CSR firmware messages less verbose Jesse Barnes
  2015-09-10 15:29 ` Damien Lespiau
@ 2015-09-11  8:29 ` Chris Wilson
  2015-09-11 16:49   ` Jesse Barnes
  1 sibling, 1 reply; 5+ messages in thread
From: Chris Wilson @ 2015-09-11  8:29 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: intel-gfx

On Thu, Sep 10, 2015 at 08:20:28AM -0700, Jesse Barnes wrote:
> Use WARN_ONCE in a bunch of places and demote a message that would
> continually spam us.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_csr.c        | 12 +++++------
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 36 ++++++++++++++++-----------------
>  2 files changed, 24 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index ba1ae03..765dfcd 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev)
>  
>  void assert_csr_loaded(struct drm_i915_private *dev_priv)
>  {
> -	WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> -	     "CSR is not loaded.\n");
> -	WARN(!I915_READ(CSR_PROGRAM_BASE),
> -				"CSR program storage start is NULL\n");
> -	WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
> -	WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> +	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> +		  "CSR is not loaded.\n");
> +	WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE),
> +		  "CSR program storage start is NULL\n");
> +	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
> +	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");

But why more than one warn in the function? If more than one fire,
trying to get the information about what happened is a nightmare.

static int assert_once;
if (assert_once)
  return;

assert_once |= DRM_ERROR_ON(cond, "message");
...
if (assert_once)
    WARN("CSR not loaded");
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: make CSR firmware messages less verbose
  2015-09-11  8:29 ` Chris Wilson
@ 2015-09-11 16:49   ` Jesse Barnes
  2015-09-12  7:58     ` Chris Wilson
  0 siblings, 1 reply; 5+ messages in thread
From: Jesse Barnes @ 2015-09-11 16:49 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx

On 09/11/2015 01:29 AM, Chris Wilson wrote:
> On Thu, Sep 10, 2015 at 08:20:28AM -0700, Jesse Barnes wrote:
>> Use WARN_ONCE in a bunch of places and demote a message that would
>> continually spam us.
>>
>> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>> ---
>>  drivers/gpu/drm/i915/intel_csr.c        | 12 +++++------
>>  drivers/gpu/drm/i915/intel_runtime_pm.c | 36 ++++++++++++++++-----------------
>>  2 files changed, 24 insertions(+), 24 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
>> index ba1ae03..765dfcd 100644
>> --- a/drivers/gpu/drm/i915/intel_csr.c
>> +++ b/drivers/gpu/drm/i915/intel_csr.c
>> @@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev)
>>  
>>  void assert_csr_loaded(struct drm_i915_private *dev_priv)
>>  {
>> -	WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED,
>> -	     "CSR is not loaded.\n");
>> -	WARN(!I915_READ(CSR_PROGRAM_BASE),
>> -				"CSR program storage start is NULL\n");
>> -	WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
>> -	WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
>> +	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
>> +		  "CSR is not loaded.\n");
>> +	WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE),
>> +		  "CSR program storage start is NULL\n");
>> +	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
>> +	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> 
> But why more than one warn in the function? If more than one fire,
> trying to get the information about what happened is a nightmare.
> 
> static int assert_once;
> if (assert_once)
>   return;
> 
> assert_once |= DRM_ERROR_ON(cond, "message");
> ...
> if (assert_once)
>     WARN("CSR not loaded");

I'm ok with getting fancier too, as long as the warnings only happen
one.  How about an ack or r-b on this one and/or a patch to make the
code more sensible?

Thanks,
Jesse

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: make CSR firmware messages less verbose
  2015-09-11 16:49   ` Jesse Barnes
@ 2015-09-12  7:58     ` Chris Wilson
  0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2015-09-12  7:58 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: intel-gfx

On Fri, Sep 11, 2015 at 09:49:32AM -0700, Jesse Barnes wrote:
> On 09/11/2015 01:29 AM, Chris Wilson wrote:
> > On Thu, Sep 10, 2015 at 08:20:28AM -0700, Jesse Barnes wrote:
> >> Use WARN_ONCE in a bunch of places and demote a message that would
> >> continually spam us.
> >>
> >> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >> ---
> >>  drivers/gpu/drm/i915/intel_csr.c        | 12 +++++------
> >>  drivers/gpu/drm/i915/intel_runtime_pm.c | 36 ++++++++++++++++-----------------
> >>  2 files changed, 24 insertions(+), 24 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> >> index ba1ae03..765dfcd 100644
> >> --- a/drivers/gpu/drm/i915/intel_csr.c
> >> +++ b/drivers/gpu/drm/i915/intel_csr.c
> >> @@ -454,10 +454,10 @@ void intel_csr_ucode_fini(struct drm_device *dev)
> >>  
> >>  void assert_csr_loaded(struct drm_i915_private *dev_priv)
> >>  {
> >> -	WARN(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> >> -	     "CSR is not loaded.\n");
> >> -	WARN(!I915_READ(CSR_PROGRAM_BASE),
> >> -				"CSR program storage start is NULL\n");
> >> -	WARN(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
> >> -	WARN(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> >> +	WARN_ONCE(intel_csr_load_status_get(dev_priv) != FW_LOADED,
> >> +		  "CSR is not loaded.\n");
> >> +	WARN_ONCE(!I915_READ(CSR_PROGRAM_BASE),
> >> +		  "CSR program storage start is NULL\n");
> >> +	WARN_ONCE(!I915_READ(CSR_SSP_BASE), "CSR SSP Base Not fine\n");
> >> +	WARN_ONCE(!I915_READ(CSR_HTP_SKL), "CSR HTP Not fine\n");
> > 
> > But why more than one warn in the function? If more than one fire,
> > trying to get the information about what happened is a nightmare.
> > 
> > static int assert_once;
> > if (assert_once)
> >   return;
> > 
> > assert_once |= DRM_ERROR_ON(cond, "message");
> > ...
> > if (assert_once)
> >     WARN("CSR not loaded");
> 
> I'm ok with getting fancier too, as long as the warnings only happen
> one.  How about an ack or r-b on this one and/or a patch to make the
> code more sensible?

Once x 10 is better than ad infinitum x 10, so
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>

Just muttering that we took a serious mistep with the WARNs and forgot
to ask ourselves if adding more makes a problem easier to debug
postmortem or harder. I think we have erred on the latter.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-09-12  7:58 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-09-10 15:20 [PATCH] drm/i915: make CSR firmware messages less verbose Jesse Barnes
2015-09-10 15:29 ` Damien Lespiau
2015-09-11  8:29 ` Chris Wilson
2015-09-11 16:49   ` Jesse Barnes
2015-09-12  7:58     ` Chris Wilson

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