From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Sharma, Shashank" Subject: Re: [PATCH v3 05/11] drm/i915/dsb: Register definition of DSB registers. Date: Wed, 28 Aug 2019 22:32:31 +0530 Message-ID: <55e0f2a6-08f3-2a63-ff83-c2129fd3e80f@intel.com> References: <20190827191026.26175-1-animesh.manna@intel.com> <20190827191026.26175-6-animesh.manna@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id E129189C96 for ; Wed, 28 Aug 2019 17:02:43 +0000 (UTC) In-Reply-To: <20190827191026.26175-6-animesh.manna@intel.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Animesh Manna , intel-gfx@lists.freedesktop.org Cc: Jani Nikula List-Id: intel-gfx@lists.freedesktop.org Ck9uIDgvMjgvMjAxOSAxMjo0MCBBTSwgQW5pbWVzaCBNYW5uYSB3cm90ZToKPiBBZGRlZCBrZXkg cmVnaXN0ZXIgZGVmaW5pdGlvbnMgb2YgRFNCLgo+Cj4gZHNiLWN0cmwgcmVnaXN0ZXIgaXMgcmVx dWlyZWQgdG8gZW5hYmxlIGRzYi1lbmdpbmUuCj4KPiBoZWFkLXB0ciByZWdpc3RlciBob2xkIHRo ZSBoZWFkIG9mIGJ1ZmZlciBhZGRyZXNzIGZyb20gd2hlcmUgdGhlCj4gZXhlY3V0aW9uIHdpbGwg c3RhcnQuCj4KPiBQcm9ncmFtbWluZyB0YWlsLXB0ciByZWdpc3RlciBpcyBhIHRyaWdnZXIgcG9p bnQgdG8gc3RhcnQgZXhlY3V0aW9uLgo+Cj4gQ2M6IFVtYSBTaGFua2FyIDx1bWEuc2hhbmthckBp bnRlbC5jb20+Cj4gQ2M6IEphbmkgTmlrdWxhIDxqYW5pLm5pa3VsYUBpbnRlbC5jb20+Cj4gQ2M6 IFJvZHJpZ28gVml2aSA8cm9kcmlnby52aXZpQGludGVsLmNvbT4KPiBTaWduZWQtb2ZmLWJ5OiBB bmltZXNoIE1hbm5hIDxhbmltZXNoLm1hbm5hQGludGVsLmNvbT4KPiAtLS0KPiAgIGRyaXZlcnMv Z3B1L2RybS9pOTE1L2k5MTVfcmVnLmggfCAxNSArKysrKysrKysrKysrKysKPiAgIDEgZmlsZSBj aGFuZ2VkLCAxNSBpbnNlcnRpb25zKCspCj4KPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJt L2k5MTUvaTkxNV9yZWcuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKPiBpbmRl eCAwMmUxZWYxMGM0N2UuLjcxYzZjMjM4MDQ0MyAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9k cm0vaTkxNS9pOTE1X3JlZy5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcu aAo+IEBAIC0xMTU2NCw0ICsxMTU2NCwxOSBAQCBlbnVtIHNrbF9wb3dlcl9nYXRlIHsKPiAgICNk ZWZpbmUgUE9SVF9UWF9ERkxFWERQQ1NTUyhmaWEpCQlfTU1JT19GSUEoKGZpYSksIDB4MDA4OTQp Cj4gICAjZGVmaW5lICAgRFBfUEhZX01PREVfU1RBVFVTX05PVF9TQUZFKHRjX3BvcnQpCQkoMSA8 PCAodGNfcG9ydCkpCj4gICAKPiArLyogVGhpcyByZWdpc3RlciBjb250cm9scyB0aGUgRGlzcGxh eSBTdGF0ZSBCdWZmZXIgKERTQikgZW5naW5lcy4gKi8KPiArI2RlZmluZSBfRFNCU0xfSU5TVEFO Q0VfQkFTRQkJMHg3MEIwMAo+ICsjZGVmaW5lIERTQlNMX0lOU1RBTkNFKHBpcGUsIGlkKQkoX0RT QlNMX0lOU1RBTkNFX0JBU0UgKyBcCj4gKwkJCQkJIChwaXBlKSAqIDB4MTAwMCArIChpZCkgKiAx MDApCj4gKyNkZWZpbmUgRFNCX0hFQUQocGlwZSwgaWQpCQlfTU1JTyhEU0JTTF9JTlNUQU5DRShw aXBlLCBpZCkgKyAweDApCj4gKyNkZWZpbmUgRFNCX1RBSUwocGlwZSwgaWQpCQlfTU1JTyhEU0JT TF9JTlNUQU5DRShwaXBlLCBpZCkgKyAweDQpCj4gKyNkZWZpbmUgRFNCX0NUUkwocGlwZSwgaWQp CQlfTU1JTyhEU0JTTF9JTlNUQU5DRShwaXBlLCBpZCkgKyAweDgpCj4gKyNkZWZpbmUgICBEU0Jf RU5BQkxFCQkJKDEgPDwgMzEpCj4gKyNkZWZpbmUgICBEU0JfQlVGRkVSX1JFSVRFUkFURQkJKDEg PDwgMjkpCj4gKyNkZWZpbmUgICBEU0JfV0FJVF9GT1JfVkJMQU5LCQkoMSA8PCAyOCkKPiArI2Rl ZmluZSAgIERTQl9XQUlUX0ZPUl9MSU5FX0lOX1JBTkdFCSgxIDw8IDI3KQo+ICsjZGVmaW5lICAg RFNCX0hBTFQJCQkoMSA8PCAxNikKPiArI2RlZmluZSAgIERTQl9OT05fUE9TVEVEX0VOQUJMRQkJ KDEgPDwgOCkKPiArI2RlZmluZSAgIERTQl9TVEFUVVMJCQkoMSA8PCAwKQo+ICsKCkFnYWluLCB0 aGlzIHBhdGNoIGlzIGp1c3QgYWRkaW5nIHRoZSBoZWFkZXIgZGVmaW5pdGlvbnMsIHBsZWFzZSBt ZXJnZSAKdGhpcyBwYXRjaCBpbiB0aGUgcGF0Y2ggd2hlcmUgdGhlc2UgZGVmaW5pdGlvbnMgYXJl IGJlaW5nIHVzZWQuCgotIFNoYXNoYW5rCgo+ICAgI2VuZGlmIC8qIF9JOTE1X1JFR19IXyAqLwpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZngg bWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZng=