From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Michel Thierry <michel.thierry@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset
Date: Wed, 30 Sep 2015 16:45:18 +0100 [thread overview]
Message-ID: <560C038E.7060408@linux.intel.com> (raw)
In-Reply-To: <1443623779-10640-2-git-send-email-michel.thierry@intel.com>
Hi,
On 30/09/15 15:36, Michel Thierry wrote:
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 67ef118..6ca39c1 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -589,11 +589,20 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
> if (entry->flags & EXEC_OBJECT_NEEDS_GTT)
> flags |= PIN_GLOBAL;
>
> + /* Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset,
> + * limit address to the first 4GBs for unflagged objects.
> + */
> + flags |= PIN_ZONE_4G;
> + if (entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)
> + flags &= ~PIN_ZONE_4G;
I spotted this patch purely accidentally since it was probably the
reason pad_to_size IGT started failing in the Android tree - given how
there is mention of changing the allocation order. Anyway beside the point..
Point is when I spotted it by accident, I also spotted this unusual
handling of flags - set then conditionally clear. Why not conditionally
set for one fewer line of code?
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-09-30 15:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-30 14:36 [PATCH 0/2] Wa32bit & Enable 48bit PPGTT Michel Thierry
2015-09-30 14:36 ` [PATCH 1/2] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-09-30 14:42 ` Chris Wilson
2015-09-30 15:45 ` Tvrtko Ursulin [this message]
2015-09-30 15:53 ` Chris Wilson
2015-10-01 12:33 ` [PATCH v2 (not really v2)] " Michel Thierry
2015-10-01 13:15 ` Daniel Vetter
2015-09-30 14:36 ` [PATCH 2/2] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-10-01 13:16 ` Daniel Vetter
2015-10-01 14:40 ` Michel Thierry
2015-10-16 12:23 ` Michel Thierry
2015-10-19 9:44 ` Daniel Vetter
2015-10-19 10:01 ` Chris Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=560C038E.7060408@linux.intel.com \
--to=tvrtko.ursulin@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michel.thierry@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox