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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 32/43] drm/i915: Clean up LVDS register handling
Date: Mon, 12 Oct 2015 09:09:52 -0700	[thread overview]
Message-ID: <561BDB50.7040300@virtuousgeek.org> (raw)
In-Reply-To: <1442595836-23981-33-git-send-email-ville.syrjala@linux.intel.com>

On 09/18/2015 10:03 AM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Keep single 'lvds_reg' and 'lvds' variable around in
> intel_lvds_init(), and read it just once at the start.
> 
> Also intel_lvds_get_config() doesn't need to figure out which reg to use
> since it can just consult lvds_encoder->reg.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lvds.c | 30 ++++++++++++++----------------
>  1 file changed, 14 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index 2c2d1f0..35bad71 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -98,15 +98,11 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
>  {
>  	struct drm_device *dev = encoder->base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u32 lvds_reg, tmp, flags = 0;
> +	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
> +	u32 tmp, flags = 0;
>  	int dotclock;
>  
> -	if (HAS_PCH_SPLIT(dev))
> -		lvds_reg = PCH_LVDS;
> -	else
> -		lvds_reg = LVDS;
> -
> -	tmp = I915_READ(lvds_reg);
> +	tmp = I915_READ(lvds_encoder->reg);
>  	if (tmp & LVDS_HSYNC_POLARITY)
>  		flags |= DRM_MODE_FLAG_NHSYNC;
>  	else
> @@ -944,6 +940,7 @@ void intel_lvds_init(struct drm_device *dev)
>  	struct drm_display_mode *downclock_mode = NULL;
>  	struct edid *edid;
>  	struct drm_crtc *crtc;
> +	u32 lvds_reg;
>  	u32 lvds;
>  	int pipe;
>  	u8 pin;
> @@ -966,8 +963,15 @@ void intel_lvds_init(struct drm_device *dev)
>  	if (dmi_check_system(intel_no_lvds))
>  		return;
>  
> +	if (HAS_PCH_SPLIT(dev))
> +		lvds_reg = PCH_LVDS;
> +	else
> +		lvds_reg = LVDS;
> +
> +	lvds = I915_READ(lvds_reg);
> +
>  	if (HAS_PCH_SPLIT(dev)) {
> -		if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
> +		if ((lvds & LVDS_DETECTED) == 0)
>  			return;
>  		if (dev_priv->vbt.edp_support) {
>  			DRM_DEBUG_KMS("disable LVDS for eDP support\n");
> @@ -977,8 +981,7 @@ void intel_lvds_init(struct drm_device *dev)
>  
>  	pin = GMBUS_PIN_PANEL;
>  	if (!lvds_is_present_in_vbt(dev, &pin)) {
> -		u32 reg = HAS_PCH_SPLIT(dev) ? PCH_LVDS : LVDS;
> -		if ((I915_READ(reg) & LVDS_PORT_EN) == 0) {
> +		if ((lvds & LVDS_PORT_EN) == 0) {
>  			DRM_DEBUG_KMS("LVDS is not present in VBT\n");
>  			return;
>  		}
> @@ -1055,11 +1058,7 @@ void intel_lvds_init(struct drm_device *dev)
>  	connector->interlace_allowed = false;
>  	connector->doublescan_allowed = false;
>  
> -	if (HAS_PCH_SPLIT(dev)) {
> -		lvds_encoder->reg = PCH_LVDS;
> -	} else {
> -		lvds_encoder->reg = LVDS;
> -	}
> +	lvds_encoder->reg = lvds_reg;
>  
>  	/* create the scaling mode property */
>  	drm_mode_create_scaling_mode_property(dev);
> @@ -1140,7 +1139,6 @@ void intel_lvds_init(struct drm_device *dev)
>  	if (HAS_PCH_SPLIT(dev))
>  		goto failed;
>  
> -	lvds = I915_READ(LVDS);
>  	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
>  	crtc = intel_get_crtc_for_pipe(dev, pipe);
>  
> 

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-10-12 16:09 UTC|newest]

Thread overview: 136+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-18 17:03 [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work ville.syrjala
2015-09-18 17:03 ` [PATCH 01/43] drm/i915: Don't pass sdvo_reg to intel_sdvo_select_{ddc, i2c}_bus() ville.syrjala
2015-09-21  7:34   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 02/43] drm/i915: Parametrize LRC registers ville.syrjala
2015-09-21  7:36   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 03/43] drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS ville.syrjala
2015-09-21  7:37   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 04/43] drm/i915: Parametrize fence registers ville.syrjala
2015-09-21  7:45   ` Jani Nikula
2015-09-21 12:33     ` Ville Syrjälä
2015-09-21 13:07       ` Ville Syrjälä
2015-09-21 15:05   ` [PATCH v2 " ville.syrjala
2015-09-25 12:02     ` Jani Nikula
2015-09-28  8:31       ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 05/43] drm/i915: Parametrize FBC_TAG registers ville.syrjala
2015-09-21  7:46   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 06/43] drm/i915: Parametrize ILK turbo registers ville.syrjala
2015-09-21  7:47   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 07/43] drm/i915: Replace raw numbers with the approproate register name in ILK turbo code ville.syrjala
2015-09-21  7:48   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 08/43] drm/i915: Parametrize TV luma/chroma filter registers ville.syrjala
2015-09-21  7:50   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 09/43] drm/i915: Parametrize DDI_BUF_TRANS registers ville.syrjala
2015-09-21  7:59   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 10/43] drm/i915: Parametrize CSR_PROGRAM registers ville.syrjala
2015-09-23 14:15   ` Mika Kuoppala
2015-09-23 15:17     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 11/43] drm/i915: Parametrize UOS_RSA_SCRATCH ville.syrjala
2015-09-28 11:39   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 12/43] drm/i915: Add LO/HI PRIVATE_PAT registers ville.syrjala
2015-09-28 11:40   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 13/43] drm/i915: Always use GEN8_RING_PDP_{LDW, UDW} instead of hand rolling the register offsets ville.syrjala
2015-09-28 11:42   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 14/43] drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR ville.syrjala
2015-09-28 11:44   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 15/43] drm/i915: Parametrize PALETTE and LGC_PALETTE ville.syrjala
2015-09-28 11:45   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 16/43] drm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/ ville.syrjala
2015-09-22 16:47   ` [PATCH v2 " ville.syrjala
2015-09-28 11:50     ` Jani Nikula
2015-09-28 13:35       ` Daniel Vetter
2015-09-28 11:49   ` [PATCH " Jani Nikula
2015-09-18 17:03 ` [PATCH 17/43] drm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/ ville.syrjala
2015-09-29 14:14   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 18/43] drm/i915: s/_TRANSA_CHICKEN/TRANS_CHICKEN(PIPE_A)/ ville.syrjala
2015-09-29 14:16   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 19/43] drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc ville.syrjala
2015-09-30 13:44   ` Jani Nikula
2015-09-30 13:53     ` Ville Syrjälä
2015-09-30 14:06   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 20/43] drm/i915: Use paramtrized WRPLL_CTL() ville.syrjala
2015-09-30 13:58   ` Jani Nikula
2015-09-30 14:00     ` Ville Syrjälä
2015-10-26 14:49     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 21/43] drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE ville.syrjala
2015-09-28 11:53   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 22/43] drm/i915: s/DDI_BUF_CTL_A/DDI_BUF_CTL(PORT_A)/ ville.syrjala
2015-09-28 11:53   ` Jani Nikula
2015-09-28 13:38     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 23/43] drm/i915: Eliminate weird parameter inversion from BXT PPS registers ville.syrjala
2015-10-12 16:41   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 24/43] drm/i915: Parametrize HSW video DIP data registers ville.syrjala
2015-10-12 15:54   ` Jesse Barnes
2015-10-12 16:15     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 25/43] drm/i915: Include gpio_mmio_base in GMBUS reg defines ville.syrjala
2015-10-12 15:56   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 26/43] drm/i915: Protect register macro arguments ville.syrjala
2015-10-12 16:03   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 27/43] drm/i915: Fix a few bad hex numbers in register defines ville.syrjala
2015-10-12 16:04   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 28/43] drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function ville.syrjala
2015-10-12 16:05   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 29/43] drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc ville.syrjala
2015-10-12 16:06   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 30/43] drm/i915: Parametrize and fix SWF registers ville.syrjala
2015-10-12 16:07   ` Jesse Barnes
2015-10-12 16:17     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 31/43] drm/i915: Throw out some useless variables ville.syrjala
2015-09-22 16:50   ` [PATCH v2 " ville.syrjala
2015-10-12 16:09     ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 32/43] drm/i915: Clean up LVDS register handling ville.syrjala
2015-10-12 16:09   ` Jesse Barnes [this message]
2015-11-01 15:33   ` Lukas Wunner
2015-11-04 16:59     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 33/43] drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE ville.syrjala
2015-10-12 16:12   ` Jesse Barnes
2015-10-13 11:21     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 34/43] drm/i915: Turn __raw_i915_read8() & co. in to inline functions ville.syrjala
2015-09-18 17:03 ` [PATCH 35/43] drm/i915: Move __raw_i915_read8() & co. into i915_drv.h ville.syrjala
2015-09-18 17:42   ` Chris Wilson
2015-09-18 18:23     ` Ville Syrjälä
2015-09-18 18:33       ` Chris Wilson
2015-09-18 18:37         ` Ville Syrjälä
2015-09-18 18:44           ` Chris Wilson
2015-09-18 19:26             ` Ville Syrjälä
2015-09-21 16:26               ` Jesse Barnes
2015-09-21 16:53                 ` Ville Syrjälä
2015-09-21 16:57                   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 36/43] drm/i915: Remove the magic AUX_CTL is at DP + foo tricks ville.syrjala
2015-09-18 17:03 ` [PATCH 37/43] drm/i915: Replace the aux ddc name switch statement with a table ville.syrjala
2015-09-18 17:03 ` [PATCH 38/43] drm/i915: Parametrize AUX registes ville.syrjala
2015-09-28 12:15   ` Jani Nikula
2015-09-28 13:28     ` Daniel Vetter
2015-09-28 13:34       ` Ville Syrjälä
2015-09-28 13:52         ` Daniel Vetter
2015-09-28 13:57           ` Jani Nikula
2015-09-28 15:09   ` [PATCH v2 38/43] drm/i915: Parametrize AUX registers ville.syrjala
2015-10-20 13:05     ` Jani Nikula
2015-10-20 13:37       ` Ville Syrjälä
2015-10-20 14:00     ` [PATCH v3 " ville.syrjala
2015-10-21  7:08       ` Jani Nikula
2015-09-18 17:03 ` [PATCH 39/43] drm/i915: Add dev_priv->psr_mmio_base ville.syrjala
2015-10-20 13:08   ` Jani Nikula
2015-10-20 14:01   ` [PATCH v2 " ville.syrjala
2015-10-21  7:09     ` Jani Nikula
2015-09-18 17:03 ` [PATCH 40/43] drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] ville.syrjala
2015-09-28 12:28   ` Jani Nikula
2015-09-28 14:36     ` Ville Syrjälä
2015-09-28 15:10   ` [PATCH v2 " ville.syrjala
2015-10-20 14:02     ` [PATCH v3 " ville.syrjala
2015-09-18 17:03 ` [PATCH 41/43] drm/i915: Model PSR AUX register selection more like the normal AUX code ville.syrjala
2015-09-28 15:11   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 42/43] drm/i915: Prefix raw register defines with underscore ville.syrjala
2015-09-18 17:03 ` [RFC][PATCH 43/43] WIP: drm/i915: Type safe register read/write ville.syrjala
2015-09-18 17:33   ` Chris Wilson
2015-09-18 17:43     ` Ville Syrjälä
2015-09-18 18:12       ` Chris Wilson
2015-09-18 18:34         ` Ville Syrjälä
2015-09-23 15:23   ` Daniel Vetter
2015-09-24 15:38     ` Ville Syrjälä
2015-09-28 12:56       ` Jani Nikula
2015-09-28 13:03         ` Ville Syrjälä
2015-09-28 13:52           ` Daniel Vetter
2015-09-18 18:17 ` [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work Chris Wilson
2015-09-22 17:41 ` Ville Syrjälä
2015-10-28 12:55 ` Jani Nikula

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