Re: [PATCH v3 01/13] drm/i915/gen9: csr_init after runtime pm enable

[Sunil Kamath <sunil.kamath@intel.com>]

On Thursday 29 October 2015 03:28 AM, Imre Deak wrote:
> From: Animesh Manna <animesh.manna@intel.com>
>
> Skl is fully dependent on dmc for going to low power state (dc5/dc6).
> This requires a trigger from rpm. To ensure the dmc firmware
> is available for runtime pm support rpm-reference-count is used
> by not releasing the rpm reference if firmware loading is
> not completed.
>
> So moved the intel_csr_ucode_init call after runtime pm enable.
>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Damien Lespiau <damien.lespiau@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Sunil Kamath <sunil.kamath@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> [imre: moved the call right after power domain init to avoid race with
>   the console modesetting]
> ---
>   drivers/gpu/drm/i915/i915_dma.c | 5 ++---
>   1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 2336af9..5d68942 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -398,6 +398,8 @@ static int i915_load_modeset_init(struct drm_device *dev)
>   
>   	intel_power_domains_init_hw(dev_priv);
>   
> +	intel_csr_ucode_init(dev);
> +

Its really unclear why this call to be done here.
We need to call just after intel_runtime_pm_enable.
With this change it will do much in advance.

Can you please add some more details about "how adding change after 
iniet_runtime_pm_enable() will create race condition for console 
modesetting?"

- Sunil


>   	ret = intel_irq_install(dev_priv);
>   	if (ret)
>   		goto cleanup_gem_stolen;
> @@ -942,9 +944,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
>   
>   	intel_uncore_init(dev);
>   
> -	/* Load CSR Firmware for SKL */
> -	intel_csr_ucode_init(dev);
> -
>   	ret = i915_gem_gtt_init(dev);
>   	if (ret)
>   		goto out_freecsr;

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