From: Gabriel Feceoru <gabriel.feceoru@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Handle PipeC fused off on HSW
Date: Tue, 12 Jan 2016 17:00:16 +0200 [thread overview]
Message-ID: <56951500.1060902@intel.com> (raw)
In-Reply-To: <20160111175646.GJ23290@intel.com>
On 11.01.2016 19:56, Ville Syrjälä wrote:
> On Mon, Dec 21, 2015 at 01:57:22PM +0200, Gabriel Feceoru wrote:
>> On some HSW boards all pipeC tests fail with various dmesg errors.
>> This seems to be caused by Pipe C beeing disabled in FUSE_STRAP and
>> thus reading back the PIPECONF register is always zero.
>>
>> Fixed by adjusting pipe_count to 2 and thus the pipeC igt tests will
>> be skipped.
>>
>> Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_dma.c | 3 +++
>> drivers/gpu/drm/i915/i915_reg.h | 1 +
>> 2 files changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
>> index 988a380..130a496 100644
>> --- a/drivers/gpu/drm/i915/i915_dma.c
>> +++ b/drivers/gpu/drm/i915/i915_dma.c
>> @@ -813,6 +813,9 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
>> !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
>> DRM_INFO("Display fused off, disabling\n");
>> info->num_pipes = 0;
>> + } else if (I915_READ(FUSE_STRAP) & HSW_PIPE_C_DISABLE) {
>> + DRM_INFO("PipeC fused off\n");
>> + info->num_pipes = 2;
>> }
>> }
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 007ae83..0432a5f 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5940,6 +5940,7 @@ enum skl_disp_power_wells {
>> #define ILK_INTERNAL_GRAPHICS_DISABLE (1 << 31)
>> #define ILK_INTERNAL_DISPLAY_DISABLE (1 << 30)
>> #define ILK_DISPLAY_DEBUG_DISABLE (1 << 29)
>> +#define HSW_PIPE_C_DISABLE (1 << 28)
>
> According to Bspec the bit is already present on IVB.
IVB and HSW are both Gen7. Are you suggesting it should be named
IVB_PIPE_C_DISABLE instead?
>
>> #define ILK_HDCP_DISABLE (1 << 25)
>> #define ILK_eDP_A_DISABLE (1 << 24)
>> #define HSW_CDCLK_LIMIT (1 << 24)
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
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next prev parent reply other threads:[~2016-01-12 14:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-21 11:57 [PATCH] drm/i915: Handle PipeC fused off on HSW Gabriel Feceoru
2015-12-21 13:13 ` ✗ warning: Fi.CI.BAT Patchwork
2015-12-21 13:14 ` Patchwork
2016-01-11 17:56 ` [PATCH] drm/i915: Handle PipeC fused off on HSW Ville Syrjälä
2016-01-12 15:00 ` Gabriel Feceoru [this message]
2016-01-12 15:08 ` Ville Syrjälä
2016-01-13 14:46 ` [PATCH v2] drm/i915: Handle PipeC fused off on GEN7+ Gabriel Feceoru
2016-01-13 14:50 ` Damien Lespiau
2016-01-13 15:41 ` ✓ success: Fi.CI.BAT Patchwork
2016-01-13 16:02 ` [PATCH v3] drm/i915: Handle PipeC fused off on IVB/HSW/BDW Gabriel Feceoru
2016-01-19 16:09 ` Patrik Jakobsson
2016-01-13 16:49 ` ✗ warning: Fi.CI.BAT Patchwork
2016-01-22 11:28 ` [PATCH v4] drm/i915: Handle PipeC fused off on IVB/HSW/BDW Gabriel Feceoru
2016-02-01 14:20 ` Patrik Jakobsson
2016-02-10 7:29 ` Daniel Vetter
2016-01-22 11:46 ` ✗ Fi.CI.BAT: warning for drm/i915: Handle PipeC fused off on HSW (rev4) Patchwork
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