From: Nick Hoath <nicholas.hoath@intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 7/8] drm/i915/skl: Enable Per context Preemption granularity control
Date: Thu, 21 Jan 2016 14:41:01 +0000 [thread overview]
Message-ID: <56A0EDFD.4040105@intel.com> (raw)
In-Reply-To: <1453384847-16361-8-git-send-email-arun.siluvery@linux.intel.com>
On 21/01/2016 14:00, Arun Siluvery wrote:
> Per context preemption granularity control is only available from SKL:E0+
>
> Cc: Dave Gordon <david.s.gordon@intel.com>
> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c51e7e9..65e32a3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5995,6 +5995,9 @@ enum skl_disp_power_wells {
> #define SKL_DFSM_CDCLK_LIMIT_450 (2 << 23)
> #define SKL_DFSM_CDCLK_LIMIT_337_5 (3 << 23)
>
> +#define GEN7_FF_SLICE_CS_CHICKEN1 _MMIO(0x20e0)
> +#define GEN9_FFSC_PERCTX_PREEMPT_CTRL (1<<14)
> +
> #define FF_SLICE_CS_CHICKEN2 _MMIO(0x20e4)
> #define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index ce64519..e91fb70 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1044,6 +1044,16 @@ static int skl_init_workarounds(struct intel_engine_cs *ring)
> if (ret)
> return ret;
>
> + /*
> + * Actual WA is to disable percontext preemption granularity control
> + * until D0 which is the default case so this is equivalent to
> + * !WaDisablePerCtxtPreemptionGranularityControl:skl
> + */
> + if (IS_SKL_REVID(dev, SKL_REVID_E0, REVID_FOREVER)) {
> + I915_WRITE(GEN7_FF_SLICE_CS_CHICKEN1,
> + _MASKED_BIT_ENABLE(GEN9_FFSC_PERCTX_PREEMPT_CTRL));
> + }
> +
> if (IS_SKL_REVID(dev, 0, SKL_REVID_D0)) {
> /* WaDisableChickenBitTSGBarrierAckForFFSliceCS:skl */
> I915_WRITE(FF_SLICE_CS_CHICKEN2,
>
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next prev parent reply other threads:[~2016-01-21 14:41 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 14:00 [PATCH v2 0/8] Gen9 HW whitelist and Preemption WA patches Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 1/8] drm/i915/gen9: Add framework to whitelist specific GPU registers Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 2/8] drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 3/8] drm/i915/gen9: Add HDC_CHICKEN1 " Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 4/8] drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 " Arun Siluvery
2016-01-21 14:40 ` Nick Hoath
2016-01-21 14:00 ` [PATCH v2 5/8] drm/i915/bxt: Add GEN8_L3SQCREG4 " Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 6/8] drm/i915/skl: " Arun Siluvery
2016-01-21 14:00 ` [PATCH v2 7/8] drm/i915/skl: Enable Per context Preemption granularity control Arun Siluvery
2016-01-21 14:41 ` Nick Hoath [this message]
2016-01-21 14:00 ` [PATCH v2 8/8] drm/i915/gen9: Add WaOCLCoherentLineFlush Arun Siluvery
2016-01-21 14:42 ` Nick Hoath
2016-01-21 14:25 ` ✗ Fi.CI.BAT: warning for Gen9 HW whitelist and Preemption WA patches (rev2) Patchwork
2016-01-21 14:36 ` Arun Siluvery
2016-01-21 15:17 ` [PATCH v2 0/8] Gen9 HW whitelist and Preemption WA patches Chris Wilson
2016-01-21 16:07 ` Arun Siluvery
2016-01-21 16:56 ` Chris Wilson
2016-01-21 17:35 ` Arun Siluvery
2016-01-25 18:01 ` Daniel Vetter
2016-01-25 18:23 ` Arun Siluvery
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