Re: [PATCH v2 8/8] drm/i915/gen9: Add WaOCLCoherentLineFlush

Nick Hoath
2016-01-21T14:42:01Z

On 21/01/2016 14:00, Arun Siluvery wrote:
> This is mainly required for preemption.
>
> Cc: Dave Gordon <david.s.gordon@intel.com>
> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>

Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>

> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index e91fb70..f26f274 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -979,6 +979,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> /* WaDisableSTUnitPowerOptimization:skl,bxt */
> WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
>
> + /* WaOCLCoherentLineFlush:skl,bxt */
> + I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
> + GEN8_LQSC_FLUSH_COHERENT_LINES));
> +
> /* WaEnablePreemptionGranularityControlByUMD:skl,bxt */
> ret= wa_ring_whitelist_reg(ring, GEN8_CS_CHICKEN1);
> if (ret)
>