Re: [PATCH 2/4] drm/i915: Fix context/engine cleanup order

Daniel Vetter
2016-01-25T18:09:24Z

On Thu, Jan 21, 2016 at 07:37:45PM +0000, Dave Gordon wrote:
> From: Nick Hoath <nicholas.hoath@intel.com>
>
> Swap the order of context & engine cleanup, so that contexts are cleaned
> up first, and *then* engines. This is a more sensible order anyway, but
> in particular has become necessary since the 'intel_ring_initialized()
> must be simple and inline' patch, which now uses ring->dev as an
> 'initialised' flag, so it can now be NULL after engine teardown. This
> in turn can cause a problem in the context code, which (used to) check
> the ring->dev->struct_mutex -- causing a fault if ring->dev was NULL.
>
> Also rename the cleanup function to reflect what it actually does
> (cleanup engines, not a ringbuffer), and fix an annoying whitespace issue.
>
> v2: Also make the fix in i915_load_modeset_init, not just in
> i915_driver_unload (Chris Wilson)
> v3: Had extra stuff in it.
> v4: Reverted extra stuff (so we're back to v2).
> Rebased and updated commentary above (Dave Gordon).
>
> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
> Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v2)

Trusting that v2==v4 and applied it.
-Daniel

>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 4 ++--
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/i915_gem.c | 23 ++++++++++++-----------
> 3 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index d70d96f..4725e8d 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -451,8 +451,8 @@ static int i915_load_modeset_init(struct drm_device *dev)
>
> cleanup_gem:
> mutex_lock(&dev->struct_mutex);
> - i915_gem_cleanup_ringbuffer(dev);
> i915_gem_context_fini(dev);
> + i915_gem_cleanup_engines(dev);
> mutex_unlock(&dev->struct_mutex);
> cleanup_irq:
> intel_guc_ucode_fini(dev);
> @@ -1196,8 +1196,8 @@ int i915_driver_unload(struct drm_device *dev)
>
> intel_guc_ucode_fini(dev);
> mutex_lock(&dev->struct_mutex);
> - i915_gem_cleanup_ringbuffer(dev);
> i915_gem_context_fini(dev);
> + i915_gem_cleanup_engines(dev);
> mutex_unlock(&dev->struct_mutex);
> intel_fbc_cleanup_cfb(dev_priv);
> i915_gem_cleanup_stolen(dev);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 204661f..021e88a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3012,7 +3012,7 @@ int i915_gem_init_rings(struct drm_device *dev);
> int __must_check i915_gem_init_hw(struct drm_device *dev);
> int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice);
> void i915_gem_init_swizzling(struct drm_device *dev);
> -void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
> +void i915_gem_cleanup_engines(struct drm_device *dev);
> int __must_check i915_gpu_idle(struct drm_device *dev);
> int __must_check i915_gem_suspend(struct drm_device *dev);
> void __i915_add_request(struct drm_i915_gem_request *req,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 371bbb2..799a53a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4912,7 +4912,7 @@ int i915_gem_init_rings(struct drm_device *dev)
> req = i915_gem_request_alloc(ring, NULL);
> if (IS_ERR(req)) {
> ret = PTR_ERR(req);
> - i915_gem_cleanup_ringbuffer(dev);
> + i915_gem_cleanup_engines(dev);
> goto out;
> }
>
> @@ -4925,7 +4925,7 @@ int i915_gem_init_rings(struct drm_device *dev)
> if (ret && ret != -EIO) {
> DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
> i915_gem_request_cancel(req);
> - i915_gem_cleanup_ringbuffer(dev);
> + i915_gem_cleanup_engines(dev);
> goto out;
> }
>
> @@ -4933,7 +4933,7 @@ int i915_gem_init_rings(struct drm_device *dev)
> if (ret && ret != -EIO) {
> DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
> i915_gem_request_cancel(req);
> - i915_gem_cleanup_ringbuffer(dev);
> + i915_gem_cleanup_engines(dev);
> goto out;
> }
>
> @@ -5008,7 +5008,7 @@ int i915_gem_init(struct drm_device *dev)
> }
>
> void
> -i915_gem_cleanup_ringbuffer(struct drm_device *dev)
> +i915_gem_cleanup_engines(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_engine_cs *ring;
> @@ -5017,13 +5017,14 @@ int i915_gem_init(struct drm_device *dev)
> for_each_ring(ring, dev_priv, i)
> dev_priv->gt.cleanup_ring(ring);
>
> - if (i915.enable_execlists)
> - /*
> - * Neither the BIOS, ourselves or any other kernel
> - * expects the system to be in execlists mode on startup,
> - * so we need to reset the GPU back to legacy mode.
> - */
> - intel_gpu_reset(dev);
> + if (i915.enable_execlists) {
> + /*
> + * Neither the BIOS, ourselves or any other kernel
> + * expects the system to be in execlists mode on startup,
> + * so we need to reset the GPU back to legacy mode.
> + */
> + intel_gpu_reset(dev);
> + }
> }
>
> static void
> --
> 1.9.1
>

--
Daniel Vetter
Software Engineer, Intel Corporation