From: Arun Siluvery <arun.siluvery@linux.intel.com>
To: Michel Thierry <michel.thierry@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RS
Date: Tue, 23 Feb 2016 14:48:39 +0000 [thread overview]
Message-ID: <56CC7147.7050105@linux.intel.com> (raw)
In-Reply-To: <1456235803-23886-1-git-send-email-michel.thierry@intel.com>
On 23/02/2016 13:56, Michel Thierry wrote:
> The driver should only set the "RS context enable" bit in the context
> image if we plan to use the resource streamer.
>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index e12fcab..c3779b9 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -2382,7 +2382,8 @@ populate_lr_context(struct intel_context *ctx, struct drm_i915_gem_object *ctx_o
> ASSIGN_CTX_REG(reg_state, CTX_CONTEXT_CONTROL, RING_CONTEXT_CONTROL(ring),
> _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
> CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
> - CTX_CTRL_RS_CTX_ENABLE));
> + (HAS_RESOURCE_STREAMER(dev) ?
> + CTX_CTRL_RS_CTX_ENABLE : 0)));
> ASSIGN_CTX_REG(reg_state, CTX_RING_HEAD, RING_HEAD(ring->mmio_base), 0);
> ASSIGN_CTX_REG(reg_state, CTX_RING_TAIL, RING_TAIL(ring->mmio_base), 0);
> /* Ring buffer start address is not known until the buffer is pinned.
>
looks good to me,
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
regards
Arun
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prev parent reply other threads:[~2016-02-23 14:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-23 13:56 [PATCH] drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RS Michel Thierry
2016-02-23 14:48 ` Arun Siluvery [this message]
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