Re: [PATCH] drm/i915/guc: Support GuC SKL v6.1

[Dave Gordon <david.s.gordon@intel.com>]

On 24/02/16 16:49, yu.dai@intel.com wrote:
> From: Alex Dai <yu.dai@intel.com>
>
> This version of GuC firmware fixes the engine reset issue where golden
> context LRC address is treated as page index by mistake. It also fixes
> the problem that scheduler stops submiting to one engine when the other
> engine work queue is full.
>
> Signed-off-by: Alex Dai <yu.dai@intel.com>

Hi Alex,

I heard a rumour that GuC 6.1 required a change to the driver interface?
If you can confirm that this is not so, then I'm happy with this, so:

Reviewed-by: Dave Gordon <david.s.gordon@intel.com>

Also: GuC 6.1 has no known outstanding bugs to be fixed, so this would 
be a really good time to enable GuC submission by default on machines 
with this firmware installed. So I'm also going to repost the enabling 
patch (which you already R-B'ed) as a reply to this, so they should be 
taken together :)

.Dave.

> ---
>   drivers/gpu/drm/i915/intel_guc_loader.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index e0093a9..e329a8a 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -59,7 +59,7 @@
>    *
>    */
>
> -#define I915_SKL_GUC_UCODE "i915/skl_guc_ver4.bin"
> +#define I915_SKL_GUC_UCODE "i915/skl_guc_ver6.bin"
>   MODULE_FIRMWARE(I915_SKL_GUC_UCODE);
>
>   /* User-friendly representation of an enum */
> @@ -611,8 +611,8 @@ void intel_guc_ucode_init(struct drm_device *dev)
>   		fw_path = NULL;
>   	} else if (IS_SKYLAKE(dev)) {
>   		fw_path = I915_SKL_GUC_UCODE;
> -		guc_fw->guc_fw_major_wanted = 4;
> -		guc_fw->guc_fw_minor_wanted = 3;
> +		guc_fw->guc_fw_major_wanted = 6;
> +		guc_fw->guc_fw_minor_wanted = 1;
>   	} else {
>   		fw_path = "";	/* unknown device */
>   	}


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