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From: "Goel, Akash" <akash.goel@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: akash.goel@intel.com
Subject: Re: [PATCH 2/2] drm/i915/bxt: Explicitly clear the Turbo control register
Date: Thu, 21 Apr 2016 14:00:30 +0530	[thread overview]
Message-ID: <57188FA6.8070609@intel.com> (raw)
In-Reply-To: <20160421073756.GH15733@nuc-i3427.alporthouse.com>



On 4/21/2016 1:07 PM, Chris Wilson wrote:
> On Thu, Apr 21, 2016 at 12:33:41PM +0530, akash.goel@intel.com wrote:
>> From: Akash Goel <akash.goel@intel.com>
>>
>> As a part of WaGsvDisableTurbo, Driver makes an early exit from the
>> Gen9 Turbo enabling function, so doesn't program the Turbo Control register.
>> But BIOS could leave the Hw Turbo as enabled, so need to explicitly clear
>> out the Control register just to avoid inconsitency with debugfs
>> interface, which will show Turbo as enabled only and that is not expected
>> after adding the WaGsvDisableTurbo. Apart from this there is no problem
>> even if the Turbo is left enabled in the Control register, as the Up/Down
>> interrupts would remain masked.
>>
>> Signed-off-by: Akash Goel <akash.goel@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++
>>   1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index b7c2186..41d5586 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -4804,6 +4804,16 @@ static void gen9_enable_rps(struct drm_device *dev)
>>
>>   	/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
>>   	if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
>> +		/*
>> +		 * BIOS could leave the Hw Turbo enabled, so need to explicitly
>> +		 * clear out the Control register just to avoid inconsitency
>> +		 * with debugfs interface, which will show  Turbo as enabled
>> +		 * only and that is not expected by the User after adding the
>> +		 * WaGsvDisableTurbo. Apart from this there is no problem even
>> +		 * if the Turbo is left enabled in the Control register, as the
>> +		 * Up/Down interrupts would remain masked.
>> +		 */
>> +		I915_WRITE(GEN6_RP_CONTROL, 0);
>
> First question. Do we not want to sanitize bios state for everybody
> during init? That is the usual procedure.
>
Sorry I am not sure. There is a sanitize for certain module parameters.
Recently for RC6 on BXT, sanitize was done depending upon the BIOS state.

> None of the *_disable_rps() actually clear GEN6_RP_CONTROL. They should
> according to the rationale above.  And then this should be a call to
> gen9_disable_rps().

Ok so will add the clearing of GEN6_RP_CONTROL in all *_disable_rps() 
and then call gen9_disable_rps().

Best regards
Akash

> -Chris
>
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  reply	other threads:[~2016-04-21  8:30 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-21  7:03 [PATCH 1/2] drm/i915: Correct the i915_frequency_info debugfs output akash.goel
2016-04-21  6:54 ` Chris Wilson
2016-04-21  7:37   ` Goel, Akash
2016-04-22 11:52     ` [PATCH 1/3] drm/i915: Macros to convert PM time interval values to microseconds akash.goel
2016-04-22 11:52       ` [PATCH v2 2/3] drm/i915: Correct the i915_frequency_info debugfs output akash.goel
2016-04-22 12:00         ` Chris Wilson
2016-04-22 11:52       ` [PATCH v2 3/3] drm/i915/bxt: Explicitly clear the Turbo control register akash.goel
2016-04-22 11:58       ` [PATCH 1/3] drm/i915: Macros to convert PM time interval values to microseconds Chris Wilson
2016-04-22 12:56       ` Daniel Vetter
2016-04-21  7:03 ` [PATCH 2/2] drm/i915/bxt: Explicitly clear the Turbo control register akash.goel
2016-04-21  7:37   ` Chris Wilson
2016-04-21  8:30     ` Goel, Akash [this message]
2016-04-21 15:27 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Correct the i915_frequency_info debugfs output Patchwork
2016-04-23 13:53 ` ✗ Fi.CI.BAT: warning " Patchwork

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