* [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools
@ 2016-05-13 14:04 Jani Nikula
2016-05-13 14:04 ` [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Jani Nikula @ 2016-05-13 14:04 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
This is more robust for assignments and comparisons.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d9d07b70f05c..bb0b6f64000e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -752,7 +752,7 @@ struct intel_csr {
func(has_ddi) sep \
func(has_fpga_dbg)
-#define DEFINE_FLAG(name) u8 name:1
+#define DEFINE_FLAG(name) bool name:1
#define SEP_SEMICOLON ;
struct intel_device_info {
--
2.1.4
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop 2016-05-13 14:04 [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Jani Nikula @ 2016-05-13 14:04 ` Jani Nikula 2016-05-13 15:08 ` Tvrtko Ursulin 2016-05-13 14:25 ` [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Tvrtko Ursulin 2016-05-13 15:05 ` ✗ Ro.CI.BAT: failure for series starting with [RESEND,1/2] " Patchwork 2 siblings, 1 reply; 10+ messages in thread From: Jani Nikula @ 2016-05-13 14:04 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula Also make the code more readable. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/i915_dma.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 547100fa3122..a8c79f6512a4 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -954,9 +954,11 @@ static void intel_device_info_runtime_init(struct drm_device *dev) else if (INTEL_INFO(dev)->gen >= 9) gen9_sseu_info_init(dev); - /* Snooping is broken on BXT A stepping. */ info->has_snoop = !info->has_llc; - info->has_snoop &= !IS_BXT_REVID(dev, 0, BXT_REVID_A1); + + /* Snooping is broken on BXT A stepping. */ + if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) + info->has_snoop = false; DRM_DEBUG_DRIVER("slice total: %u\n", info->slice_total); DRM_DEBUG_DRIVER("subslice total: %u\n", info->subslice_total); -- 2.1.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop 2016-05-13 14:04 ` [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop Jani Nikula @ 2016-05-13 15:08 ` Tvrtko Ursulin 0 siblings, 0 replies; 10+ messages in thread From: Tvrtko Ursulin @ 2016-05-13 15:08 UTC (permalink / raw) To: Jani Nikula, intel-gfx On 13/05/16 15:04, Jani Nikula wrote: > Also make the code more readable. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_dma.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index 547100fa3122..a8c79f6512a4 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -954,9 +954,11 @@ static void intel_device_info_runtime_init(struct drm_device *dev) > else if (INTEL_INFO(dev)->gen >= 9) > gen9_sseu_info_init(dev); > > - /* Snooping is broken on BXT A stepping. */ > info->has_snoop = !info->has_llc; > - info->has_snoop &= !IS_BXT_REVID(dev, 0, BXT_REVID_A1); > + > + /* Snooping is broken on BXT A stepping. */ > + if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) > + info->has_snoop = false; > > DRM_DEBUG_DRIVER("slice total: %u\n", info->slice_total); > DRM_DEBUG_DRIVER("subslice total: %u\n", info->subslice_total); > Yeah that is more readable. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools 2016-05-13 14:04 [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Jani Nikula 2016-05-13 14:04 ` [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop Jani Nikula @ 2016-05-13 14:25 ` Tvrtko Ursulin 2016-05-13 14:33 ` Chris Wilson 2016-05-13 15:05 ` ✗ Ro.CI.BAT: failure for series starting with [RESEND,1/2] " Patchwork 2 siblings, 1 reply; 10+ messages in thread From: Tvrtko Ursulin @ 2016-05-13 14:25 UTC (permalink / raw) To: Jani Nikula, intel-gfx On 13/05/16 15:04, Jani Nikula wrote: > This is more robust for assignments and comparisons. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index d9d07b70f05c..bb0b6f64000e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -752,7 +752,7 @@ struct intel_csr { > func(has_ddi) sep \ > func(has_fpga_dbg) > > -#define DEFINE_FLAG(name) u8 name:1 > +#define DEFINE_FLAG(name) bool name:1 > #define SEP_SEMICOLON ; > > struct intel_device_info { > The churn virus spreads? :) I tried that but it was negatively impacting the compiler. For some reason it increases .text by 2.5k here. Don't see anything obvious, would have to look at the code more closely to spot exactly why. Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools 2016-05-13 14:25 ` [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Tvrtko Ursulin @ 2016-05-13 14:33 ` Chris Wilson 2016-05-13 14:47 ` Jani Nikula 0 siblings, 1 reply; 10+ messages in thread From: Chris Wilson @ 2016-05-13 14:33 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: Jani Nikula, intel-gfx On Fri, May 13, 2016 at 03:25:05PM +0100, Tvrtko Ursulin wrote: > > On 13/05/16 15:04, Jani Nikula wrote: > >This is more robust for assignments and comparisons. > > > >Signed-off-by: Jani Nikula <jani.nikula@intel.com> > >--- > > drivers/gpu/drm/i915/i915_drv.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > >index d9d07b70f05c..bb0b6f64000e 100644 > >--- a/drivers/gpu/drm/i915/i915_drv.h > >+++ b/drivers/gpu/drm/i915/i915_drv.h > >@@ -752,7 +752,7 @@ struct intel_csr { > > func(has_ddi) sep \ > > func(has_fpga_dbg) > > > >-#define DEFINE_FLAG(name) u8 name:1 > >+#define DEFINE_FLAG(name) bool name:1 > > #define SEP_SEMICOLON ; > > > > struct intel_device_info { > > > > The churn virus spreads? :) > > I tried that but it was negatively impacting the compiler. For some > reason it increases .text by 2.5k here. Don't see anything obvious, > would have to look at the code more closely to spot exactly why. Oh, that's not fun. bool:1 holds such promise for a clear explanation of the most common form of bitfield. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools 2016-05-13 14:33 ` Chris Wilson @ 2016-05-13 14:47 ` Jani Nikula 2016-05-13 15:05 ` Tvrtko Ursulin 0 siblings, 1 reply; 10+ messages in thread From: Jani Nikula @ 2016-05-13 14:47 UTC (permalink / raw) To: Chris Wilson, Tvrtko Ursulin; +Cc: intel-gfx On Fri, 13 May 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote: > On Fri, May 13, 2016 at 03:25:05PM +0100, Tvrtko Ursulin wrote: >> >> On 13/05/16 15:04, Jani Nikula wrote: >> >This is more robust for assignments and comparisons. >> > >> >Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> >--- >> > drivers/gpu/drm/i915/i915_drv.h | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> >diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >> >index d9d07b70f05c..bb0b6f64000e 100644 >> >--- a/drivers/gpu/drm/i915/i915_drv.h >> >+++ b/drivers/gpu/drm/i915/i915_drv.h >> >@@ -752,7 +752,7 @@ struct intel_csr { >> > func(has_ddi) sep \ >> > func(has_fpga_dbg) >> > >> >-#define DEFINE_FLAG(name) u8 name:1 >> >+#define DEFINE_FLAG(name) bool name:1 >> > #define SEP_SEMICOLON ; >> > >> > struct intel_device_info { >> > >> >> The churn virus spreads? :) >> >> I tried that but it was negatively impacting the compiler. For some >> reason it increases .text by 2.5k here. Don't see anything obvious, >> would have to look at the code more closely to spot exactly why. > > Oh, that's not fun. bool:1 holds such promise for a clear explanation of > the most common form of bitfield. Really a bummer, especially since assigning any positive even number to unsigned int foo:1 will result in 0. BR, Jani. -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools 2016-05-13 14:47 ` Jani Nikula @ 2016-05-13 15:05 ` Tvrtko Ursulin 2016-05-16 10:46 ` Dave Gordon 0 siblings, 1 reply; 10+ messages in thread From: Tvrtko Ursulin @ 2016-05-13 15:05 UTC (permalink / raw) To: Jani Nikula, Chris Wilson; +Cc: intel-gfx On 13/05/16 15:47, Jani Nikula wrote: > On Fri, 13 May 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote: >> On Fri, May 13, 2016 at 03:25:05PM +0100, Tvrtko Ursulin wrote: >>> >>> On 13/05/16 15:04, Jani Nikula wrote: >>>> This is more robust for assignments and comparisons. >>>> >>>> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >>>> --- >>>> drivers/gpu/drm/i915/i915_drv.h | 2 +- >>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >>>> index d9d07b70f05c..bb0b6f64000e 100644 >>>> --- a/drivers/gpu/drm/i915/i915_drv.h >>>> +++ b/drivers/gpu/drm/i915/i915_drv.h >>>> @@ -752,7 +752,7 @@ struct intel_csr { >>>> func(has_ddi) sep \ >>>> func(has_fpga_dbg) >>>> >>>> -#define DEFINE_FLAG(name) u8 name:1 >>>> +#define DEFINE_FLAG(name) bool name:1 >>>> #define SEP_SEMICOLON ; >>>> >>>> struct intel_device_info { >>>> >>> >>> The churn virus spreads? :) >>> >>> I tried that but it was negatively impacting the compiler. For some >>> reason it increases .text by 2.5k here. Don't see anything obvious, >>> would have to look at the code more closely to spot exactly why. >> >> Oh, that's not fun. bool:1 holds such promise for a clear explanation of >> the most common form of bitfield. > > Really a bummer, especially since assigning any positive even number to > unsigned int foo:1 will result in 0. That is a pretty strong argument to go for this rather than make sure all places which set them are correct. Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools 2016-05-13 15:05 ` Tvrtko Ursulin @ 2016-05-16 10:46 ` Dave Gordon 2016-05-16 15:24 ` Jani Nikula 0 siblings, 1 reply; 10+ messages in thread From: Dave Gordon @ 2016-05-16 10:46 UTC (permalink / raw) To: intel-gfx On 13/05/16 16:05, Tvrtko Ursulin wrote: > > On 13/05/16 15:47, Jani Nikula wrote: >> On Fri, 13 May 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote: >>> On Fri, May 13, 2016 at 03:25:05PM +0100, Tvrtko Ursulin wrote: >>>> >>>> On 13/05/16 15:04, Jani Nikula wrote: >>>>> This is more robust for assignments and comparisons. >>>>> >>>>> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >>>>> --- >>>>> drivers/gpu/drm/i915/i915_drv.h | 2 +- >>>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>>> >>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h >>>>> b/drivers/gpu/drm/i915/i915_drv.h >>>>> index d9d07b70f05c..bb0b6f64000e 100644 >>>>> --- a/drivers/gpu/drm/i915/i915_drv.h >>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h >>>>> @@ -752,7 +752,7 @@ struct intel_csr { >>>>> func(has_ddi) sep \ >>>>> func(has_fpga_dbg) >>>>> >>>>> -#define DEFINE_FLAG(name) u8 name:1 >>>>> +#define DEFINE_FLAG(name) bool name:1 >>>>> #define SEP_SEMICOLON ; >>>>> >>>>> struct intel_device_info { >>>>> >>>> >>>> The churn virus spreads? :) >>>> >>>> I tried that but it was negatively impacting the compiler. For some >>>> reason it increases .text by 2.5k here. Don't see anything obvious, >>>> would have to look at the code more closely to spot exactly why. >>> >>> Oh, that's not fun. bool:1 holds such promise for a clear explanation of >>> the most common form of bitfield. >> >> Really a bummer, especially since assigning any positive even number to >> unsigned int foo:1 will result in 0. > > That is a pretty strong argument to go for this rather than make sure > all places which set them are correct. > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Regards, > Tvrtko Unfortunately, the compiler doesn't generate such good code when using 'bool' vs. 'u8' for these bitfields. Firstly, it looks like the compiler DOESN'T combine bool-bitfield tests such as "if (IS_A() || IS_B())", whereas it does if they're u8. Example: With bitfields as 'u8' if (IS_HASWELL(dev) || IS_BROADWELL(dev)) 48 8b 57 28 mov 0x28(%rdi),%rdx # dev->dev_priv 0f b6 52 30 movzbl 0x30(%rdx),%edx # dev_priv->flag byte f6 c2 60 test $0x60,%dl # (haswell|broadwell) 0f 85 bb 00 00 00 jne 12e4 # branch to if-true else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) 83 e2 18 and $0x18,%edx # test two more flags 0f 84 1c 01 00 00 je 134e # skip if neither ... code for VLV/CHV ... (code for HSW/BDW is out-of-line, at the end of the function) With bitfields as bools: 48 8b 57 28 mov 0x28(%rdi),%rdx # dev->dev_priv 0f b6 52 30 movzbl 0x30(%rdx),%edx # dev_priv->flag byte f6 c2 20 test $0x20,%dl # test one flag 75 09 jne 1241 # jump if true f6 c2 40 test $0x40,%dl # test other flag 0f 84 b7 00 00 00 je 12f8 # skip if not ... code for HSW/BDW ... (code for VLV/CHV/other is later) So that would suggest that the compiler generates more efficient code for 'u8' (at least it didn't reload the flag byte even in the 'bool' case). Here's another case: With bitfields as bools: dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ? HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE; 0f b6 43 30 movzbl 0x30(%rbx),%eax # flags byte c0 e8 05 shr $0x5,%al # haswell->bit 0 83 e0 01 and $0x1,%eax # leaves bit 0 only 3c 01 cmp $0x1,%al # compare to 1u 19 c0 sbb %eax,%eax # convert to 0/-1 25 00 b0 00 00 and $0xb000,%eax # convert to 0/b000 05 00 48 06 00 add $0x64800,%eax # final result 89 83 e8 20 00 00 mov %eax,0x20e8(%rbx)# store it This is ingenious code, avoiding any branching. Now with 'u8': 0f b6 43 30 movzbl 0x30(%rbx),%eax 83 e0 20 and $0x20,%eax # leaves bit 5 only 3c 01 cmp $0x1,%al # compare to 1u 19 c0 sbb %eax,%eax # convert to 0/-1 25 00 b0 00 00 and $0xb000,%eax # etc 05 00 48 06 00 add $0x64800,%eax 89 83 e8 20 00 00 mov %eax,0x20e8(%rbx) Again it's shorter, because the compiler has been able to extract a truth-value without shifting the "haswell" bit down to bit 0 first. .Dave. _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools 2016-05-16 10:46 ` Dave Gordon @ 2016-05-16 15:24 ` Jani Nikula 0 siblings, 0 replies; 10+ messages in thread From: Jani Nikula @ 2016-05-16 15:24 UTC (permalink / raw) To: Dave Gordon, intel-gfx On Mon, 16 May 2016, Dave Gordon <david.s.gordon@intel.com> wrote: > On 13/05/16 16:05, Tvrtko Ursulin wrote: >> >> On 13/05/16 15:47, Jani Nikula wrote: >>> On Fri, 13 May 2016, Chris Wilson <chris@chris-wilson.co.uk> wrote: >>>> On Fri, May 13, 2016 at 03:25:05PM +0100, Tvrtko Ursulin wrote: >>>>> >>>>> On 13/05/16 15:04, Jani Nikula wrote: >>>>>> This is more robust for assignments and comparisons. >>>>>> >>>>>> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >>>>>> --- >>>>>> drivers/gpu/drm/i915/i915_drv.h | 2 +- >>>>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h >>>>>> b/drivers/gpu/drm/i915/i915_drv.h >>>>>> index d9d07b70f05c..bb0b6f64000e 100644 >>>>>> --- a/drivers/gpu/drm/i915/i915_drv.h >>>>>> +++ b/drivers/gpu/drm/i915/i915_drv.h >>>>>> @@ -752,7 +752,7 @@ struct intel_csr { >>>>>> func(has_ddi) sep \ >>>>>> func(has_fpga_dbg) >>>>>> >>>>>> -#define DEFINE_FLAG(name) u8 name:1 >>>>>> +#define DEFINE_FLAG(name) bool name:1 >>>>>> #define SEP_SEMICOLON ; >>>>>> >>>>>> struct intel_device_info { >>>>>> >>>>> >>>>> The churn virus spreads? :) >>>>> >>>>> I tried that but it was negatively impacting the compiler. For some >>>>> reason it increases .text by 2.5k here. Don't see anything obvious, >>>>> would have to look at the code more closely to spot exactly why. >>>> >>>> Oh, that's not fun. bool:1 holds such promise for a clear explanation of >>>> the most common form of bitfield. >>> >>> Really a bummer, especially since assigning any positive even number to >>> unsigned int foo:1 will result in 0. >> >> That is a pretty strong argument to go for this rather than make sure >> all places which set them are correct. >> >> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> >> >> Regards, >> Tvrtko > > Unfortunately, the compiler doesn't generate such good code when using > 'bool' vs. 'u8' for these bitfields. I've pushed patch 2/2 while the jury seems to be still out for 1/2. Generally we might prefer bools anyway, but this struct is const in dev_priv with the idea that this is immutable data, and we override the const briefly on driver load in intel_device_info_runtime_init(). Checking all usage is not a huge effort, although we might still screw this up later on... BR, Jani. > > Firstly, it looks like the compiler DOESN'T combine bool-bitfield tests > such as "if (IS_A() || IS_B())", whereas it does if they're u8. Example: > > With bitfields as 'u8' > > if (IS_HASWELL(dev) || IS_BROADWELL(dev)) > 48 8b 57 28 mov 0x28(%rdi),%rdx # dev->dev_priv > 0f b6 52 30 movzbl 0x30(%rdx),%edx # dev_priv->flag byte > f6 c2 60 test $0x60,%dl # (haswell|broadwell) > 0f 85 bb 00 00 00 jne 12e4 # branch to if-true > > else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) > 83 e2 18 and $0x18,%edx # test two more flags > 0f 84 1c 01 00 00 je 134e # skip if neither > ... code for VLV/CHV ... > (code for HSW/BDW is out-of-line, at the end of the function) > > With bitfields as bools: > > 48 8b 57 28 mov 0x28(%rdi),%rdx # dev->dev_priv > 0f b6 52 30 movzbl 0x30(%rdx),%edx # dev_priv->flag byte > f6 c2 20 test $0x20,%dl # test one flag > 75 09 jne 1241 # jump if true > f6 c2 40 test $0x40,%dl # test other flag > 0f 84 b7 00 00 00 je 12f8 # skip if not > ... code for HSW/BDW ... > (code for VLV/CHV/other is later) > > So that would suggest that the compiler generates more efficient code > for 'u8' (at least it didn't reload the flag byte even in the 'bool' > case). Here's another case: > > With bitfields as bools: > > dev_priv->psr_mmio_base = IS_HASWELL(dev_priv) ? > HSW_EDP_PSR_BASE : BDW_EDP_PSR_BASE; > 0f b6 43 30 movzbl 0x30(%rbx),%eax # flags byte > c0 e8 05 shr $0x5,%al # haswell->bit 0 > 83 e0 01 and $0x1,%eax # leaves bit 0 only > 3c 01 cmp $0x1,%al # compare to 1u > 19 c0 sbb %eax,%eax # convert to 0/-1 > 25 00 b0 00 00 and $0xb000,%eax # convert to 0/b000 > 05 00 48 06 00 add $0x64800,%eax # final result > 89 83 e8 20 00 00 mov %eax,0x20e8(%rbx)# store it > > This is ingenious code, avoiding any branching. Now with 'u8': > > 0f b6 43 30 movzbl 0x30(%rbx),%eax > 83 e0 20 and $0x20,%eax # leaves bit 5 only > 3c 01 cmp $0x1,%al # compare to 1u > 19 c0 sbb %eax,%eax # convert to 0/-1 > 25 00 b0 00 00 and $0xb000,%eax # etc > 05 00 48 06 00 add $0x64800,%eax > 89 83 e8 20 00 00 mov %eax,0x20e8(%rbx) > > Again it's shorter, because the compiler has been able to extract a > truth-value without shifting the "haswell" bit down to bit 0 first. > > .Dave. > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ Ro.CI.BAT: failure for series starting with [RESEND,1/2] drm/i915: make device info bitfield flags bools 2016-05-13 14:04 [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Jani Nikula 2016-05-13 14:04 ` [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop Jani Nikula 2016-05-13 14:25 ` [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Tvrtko Ursulin @ 2016-05-13 15:05 ` Patchwork 2 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2016-05-13 15:05 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [RESEND,1/2] drm/i915: make device info bitfield flags bools URL : https://patchwork.freedesktop.org/series/7149/ State : failure == Summary == Series 7149v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/7149/revisions/1/mbox Test kms_flip: Subgroup basic-flip-vs-wf_vblank: pass -> FAIL (ro-byt-n2820) Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-a: dmesg-warn -> PASS (ro-ivb2-i7-3770) Test kms_sink_crc_basic: skip -> PASS (ro-skl-i7-6700hq) ro-bdw-i5-5250u total:219 pass:181 dwarn:0 dfail:0 fail:0 skip:38 ro-bdw-i7-5557U total:219 pass:206 dwarn:0 dfail:0 fail:0 skip:13 ro-bdw-i7-5600u total:219 pass:187 dwarn:0 dfail:0 fail:0 skip:32 ro-bsw-n3050 total:219 pass:174 dwarn:0 dfail:0 fail:3 skip:42 ro-byt-n2820 total:218 pass:173 dwarn:0 dfail:0 fail:4 skip:41 ro-hsw-i3-4010u total:218 pass:193 dwarn:0 dfail:0 fail:0 skip:25 ro-hsw-i7-4770r total:219 pass:194 dwarn:0 dfail:0 fail:0 skip:25 ro-ilk-i7-620lm total:219 pass:151 dwarn:0 dfail:0 fail:1 skip:67 ro-ilk1-i5-650 total:214 pass:152 dwarn:0 dfail:0 fail:1 skip:61 ro-ivb-i7-3770 total:219 pass:183 dwarn:0 dfail:0 fail:0 skip:36 ro-ivb2-i7-3770 total:219 pass:187 dwarn:0 dfail:0 fail:0 skip:32 ro-skl-i7-6700hq total:214 pass:190 dwarn:0 dfail:0 fail:0 skip:24 ro-snb-i7-2620M total:219 pass:177 dwarn:0 dfail:0 fail:1 skip:41 Results at /archive/results/CI_IGT_test/RO_Patchwork_891/ b72b8e4 drm-intel-nightly: 2016y-05m-13d-12h-18m-56s UTC integration manifest 23b0257 drm/i915: don't mix bitwise and logical operations for has_snoop 0e2cf7a drm/i915: make device info bitfield flags bools _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-05-16 15:24 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-05-13 14:04 [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Jani Nikula 2016-05-13 14:04 ` [PATCH RESEND 2/2] drm/i915: don't mix bitwise and logical operations for has_snoop Jani Nikula 2016-05-13 15:08 ` Tvrtko Ursulin 2016-05-13 14:25 ` [PATCH RESEND 1/2] drm/i915: make device info bitfield flags bools Tvrtko Ursulin 2016-05-13 14:33 ` Chris Wilson 2016-05-13 14:47 ` Jani Nikula 2016-05-13 15:05 ` Tvrtko Ursulin 2016-05-16 10:46 ` Dave Gordon 2016-05-16 15:24 ` Jani Nikula 2016-05-13 15:05 ` ✗ Ro.CI.BAT: failure for series starting with [RESEND,1/2] " Patchwork
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