From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Zhi Wang <zhi.a.wang@intel.com>,
intel-gfx@lists.freedesktop.org, david.s.gordon@intel.com,
joonas.lahtinen@linux.intel.com, kevin.tian@intel.com,
zhiyuan.lv@intel.com
Subject: Re: [PATCH 11/15] drm/i915: Introduce execlist context status change notification
Date: Mon, 16 May 2016 15:00:05 +0100 [thread overview]
Message-ID: <5739D265.6010603@linux.intel.com> (raw)
In-Reply-To: <1463333573-25112-12-git-send-email-zhi.a.wang@intel.com>
On 15/05/16 18:32, Zhi Wang wrote:
> This patch introduces an approach to track the execlist context status
> change.
>
> GVT-g uses GVT context as the "shadow context". The content inside GVT
> context will be copied back to guest after the context is idle. So GVT-g
> has to know the status of the execlist context.
>
> This function is configurable in the context creation service. Currently,
> Only GVT-g will create the "status-change-notification" enabled GEM
> context.
>
> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +++++
> drivers/gpu/drm/i915/intel_lrc.c | 23 +++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_lrc.h | 5 +++++
> 3 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7f050a3..1c9e865 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -884,6 +884,8 @@ struct intel_context {
> bool initialised;
> bool skip_init_context;
> u32 ring_buffer_size;
> + bool enable_status_change_notification;
This flag will be per context and not per context-engine, correct? In
which case it would be worth moving it to the context. Would make
execlists_context_status_change cheaper as well.
> + struct atomic_notifier_head status_notifier_head;
> } engine[I915_NUM_ENGINES];
> bool use_48bit_addressing_mode;
>
> @@ -2403,6 +2405,9 @@ struct drm_i915_gem_request {
>
> /** Execlists context hardware id. */
> unsigned ctx_hw_id;
> +
> + /** GVT workload **/
> + void *gvt_workload;
Why is this a void *, for what it will be used ? I can't see in this
patch series what will be stored here so asking. Is it only temporary
until further patches?
Also, is it really per-request? I am just wondering since other patches
are mostly concerned about contexts.
> };
>
> struct drm_i915_gem_request * __must_check
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 0a96d4a..aeaea2e 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -415,6 +415,19 @@ static void execlists_submit_requests(struct drm_i915_gem_request *rq0,
> spin_unlock_irq(&dev_priv->uncore.lock);
> }
>
> +static inline void execlists_context_status_change(
> + struct drm_i915_gem_request *req,
> + unsigned long status)
> +{
> + if (!req->ctx->engine[req->engine->id].
> + enable_status_change_notification)
> + return;
> +
> + atomic_notifier_call_chain(
> + &req->ctx->engine[req->engine->id].status_notifier_head,
> + status, req->gvt_workload);
> +}
I would really like to see this compiled out when !CONFIG_DRM_I915_GVT.
Otherwise is just adding useless conditionals on submission fast paths.
> +
> static void execlists_context_unqueue(struct intel_engine_cs *engine)
> {
> struct drm_i915_gem_request *req0 = NULL, *req1 = NULL;
> @@ -450,6 +463,11 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine)
> if (unlikely(!req0))
> return;
>
> + execlists_context_status_change(req0, CONTEXT_SCHEDULE_IN);
> +
> + if (req1)
> + execlists_context_status_change(req1, CONTEXT_SCHEDULE_IN);
> +
> if (req0->elsp_submitted & engine->idle_lite_restore_wa) {
> /*
> * WaIdleLiteRestore: make sure we never cause a lite restore
> @@ -488,6 +506,8 @@ execlists_check_remove_request(struct intel_engine_cs *engine, u32 ctx_id)
> if (--head_req->elsp_submitted > 0)
> return 0;
>
> + execlists_context_status_change(head_req, CONTEXT_SCHEDULE_OUT);
> +
> list_del(&head_req->execlist_link);
> i915_gem_request_unreference(head_req);
>
> @@ -2541,6 +2561,9 @@ static int execlists_context_deferred_alloc(struct intel_context *ctx,
> ctx->engine[engine->id].state = ctx_obj;
> ctx->engine[engine->id].initialised = engine_initialised(ctx, engine);
>
> + if (ctx->engine[engine->id].enable_status_change_notification)
> + ATOMIC_INIT_NOTIFIER_HEAD(
> + &ctx->engine[engine->id].status_notifier_head);
> return 0;
>
> error_ringbuf:
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 1afba03..98c94ee 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -57,6 +57,11 @@
> #define GEN8_CSB_READ_PTR(csb_status) \
> (((csb_status) & GEN8_CSB_READ_PTR_MASK) >> 8)
>
> +enum {
> + CONTEXT_SCHEDULE_IN = 0,
> + CONTEXT_SCHEDULE_OUT,
> +};
> +
> /* Logical Rings */
> int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
> int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request);
>
Regards,
Tvrtko
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next prev parent reply other threads:[~2016-05-16 14:00 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-15 17:32 [PATCH 00/15] Introduce the implementation of GVT context Zhi Wang
2016-05-15 17:32 ` [PATCH 01/15] drm/i915: Factor out i915_pvinfo.h Zhi Wang
2016-05-15 17:32 ` [PATCH 02/15] drm/i915/gvt: Fold vGPU active check into inner functions Zhi Wang
2016-05-16 10:49 ` Tvrtko Ursulin
2016-05-16 13:56 ` Wang, Zhi A
2016-05-15 17:32 ` [PATCH 03/15] drm/i915: gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-05-16 12:03 ` Tvrtko Ursulin
2016-05-17 2:55 ` Wang, Zhi A
2016-05-15 17:32 ` [PATCH 04/15] drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang
2016-05-15 17:32 ` [PATCH 05/15] drm/i915: Set ctx->ppgtt for aliasing PPGTT in context creation Zhi Wang
2016-05-16 13:30 ` Tvrtko Ursulin
2016-05-16 14:16 ` Wang, Zhi A
2016-05-16 14:26 ` Wang, Zhi A
2016-05-15 17:32 ` [PATCH 06/15] drm/i915: Allow the caller to create a intel_context without PPGTT Zhi Wang
2016-05-16 15:13 ` Chris Wilson
2016-05-16 15:18 ` Wang, Zhi A
2016-05-15 17:32 ` [PATCH 07/15] drm/i915: Populate context PDPs if it has a PPGTT Zhi Wang
2016-05-15 17:32 ` [PATCH 08/15] drm/i915: Introduce an option for skipping engine context initialization Zhi Wang
2016-05-15 17:32 ` [PATCH 09/15] drm/i915: Make ring buffer size configurable Zhi Wang
2016-05-15 17:32 ` [PATCH 10/15] drm/i915: Generate addressing mode bit from flag in context Zhi Wang
2016-05-16 13:47 ` Tvrtko Ursulin
2016-05-15 17:32 ` [PATCH 11/15] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-05-16 14:00 ` Tvrtko Ursulin [this message]
2016-05-16 14:28 ` Wang, Zhi A
2016-05-15 17:32 ` [PATCH 12/15] drm/i915: Support context single submission Zhi Wang
2016-05-15 17:32 ` [PATCH 13/15] drm/i915: Introduce GVT context creation API Zhi Wang
2016-05-15 17:32 ` [PATCH 14/15] drm/i915: Factor out and expose i915_steal_fence() Zhi Wang
2016-05-16 14:57 ` Chris Wilson
2016-05-16 15:13 ` Wang, Zhi A
2016-05-15 17:32 ` [PATCH 15/15] drm/i915: Expose i915_find_fence_reg() Zhi Wang
2016-05-16 5:29 ` ✗ Ro.CI.BAT: failure for Introduce the implementation of GVT context Patchwork
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