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From: "Kamble, Sagar A" <sagar.a.kamble@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Matt Roper <matthew.d.roper@intel.com>,
	intel-gfx@lists.freedesktop.org, Zhe Wang <zhe1.wang@intel.com>,
	Akash Goel <akash.goel@intel.com>,
	"Satyanantha, Rama Gopal M" <rama.gopal.m.satyanantha@intel.com>,
	Deepak S <deepak.s@intel.com>
Subject: Re: [PATCH v4 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled
Date: Wed, 1 Jun 2016 13:44:05 +0530	[thread overview]
Message-ID: <574E994D.8090409@intel.com> (raw)
In-Reply-To: <20160601065442.GA21200@nuc-i3427.alporthouse.com>



On 6/1/2016 12:24 PM, Chris Wilson wrote:
> On Tue, May 31, 2016 at 04:18:34PM -0700, Matt Roper wrote:
>> On Tue, May 31, 2016 at 09:51:53AM +0100, Chris Wilson wrote:
>>> On Tue, May 31, 2016 at 01:58:27PM +0530, Sagar Arun Kamble wrote:
>>>> On Loading, GuC sets PM interrupts routing (bit 31) and clears ARAT
>>>> expired interrupt (bit 9). Host turbo also updates this register
>>>> in RPS flows. This patch ensures bit 31 and bit 9 setup by GuC persists.
>>>> ARAT timer interrupt is needed in GuC for various features. It also
>>>> facilitates halting GuC and hence achieving RC6. PM interrupt routing
>>>> will not impact RPS interrupt reception by host as GuC will redirect
>>>> them.
>>>> This patch fixes igt test pm_rc6_residency that was failing with guc
>>>> load/submission enabled. Tested with SKL GuC v6.1 and BXT GuC v5.1 and v8.7.
>>>>
>>>> v2: i915_irq/i915_pm decoupling from intel_guc. (ChrisW)
>>>>
>>>> v3: restructuring the mask update and rebase w.r.t Ville's patch. (ChrisW)
>>>>
>>>> v4: Updating the pm_intr_keep during direct_interrupts_to_guc. (Sagar)
>>>>
>>>> Cc: Chris Harris <chris.harris@intel.com>
>>>> Cc: Zhe Wang <zhe1.wang@intel.com>
>>>> Cc: Deepak S <deepak.s@intel.com>
>>>> Cc: Satyanantha, Rama Gopal M <rama.gopal.m.satyanantha@intel.com>
>>>> Cc: Akash Goel <akash.goel@intel.com>
>>>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>>> I can understand what you mean by this patch, perfect!
>>> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>>> -Chris
>> Testcase: igt/pm_rc6_residency
>> Tested-by: Matt Roper <matthew.d.roper@intel.com>
>>
>> Merged to dinq.  Thanks for the patch and review.
> This was only the second patch, it also wants the first patch to always
> use gen6_sanitize_pm_mask otherwise we loose the interrupt bypass from
> gen6_rps_idle(). That should have been caught by the testcase...
> -Chris
BAT picked up these patches separately. I had submitted them in sequence 
although I updated current patch twice posting them together.
How is this supposed to work?
>

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  reply	other threads:[~2016-06-01  8:14 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-30  9:52 [PATCH 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC submission Sagar Arun Kamble
2016-05-30 10:08 ` Chris Wilson
2016-05-30 11:21   ` [PATCH v2 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled Sagar Arun Kamble
2016-05-30 12:48     ` Chris Wilson
2016-05-30 18:46       ` [PATCH 1/2] SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck in an infinite batch buffer loop. The GPU apparently hogs something critical and CPUs start to lose interrupts and whatnot. We can keep the system limping along by unmasking some interrupts in GEN6_PMINTRMSK. The EI up interrupt has been previously chosen for that task, so let's never mask it Sagar Arun Kamble
2016-05-30 18:46         ` [PATCH v3 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled Sagar Arun Kamble
2016-05-30 20:18           ` Chris Wilson
2016-05-31  5:24             ` Kamble, Sagar A
2016-05-31  8:28               ` [PATCH v4 " Sagar Arun Kamble
2016-05-31  8:51                 ` Chris Wilson
2016-05-31 23:18                   ` Matt Roper
2016-06-01  6:54                     ` Chris Wilson
2016-06-01  8:14                       ` Kamble, Sagar A [this message]
2016-06-01 14:29                       ` Matt Roper
2016-06-02 12:12                         ` Kamble, Sagar A
2016-06-02 12:59                           ` Chris Wilson
2016-05-30 18:55         ` [PATCH 1/1] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB Sagar Arun Kamble
2016-05-31 11:05         ` ✗ Ro.CI.BAT: warning for series starting with [1/1] " Patchwork
2016-06-01  8:12           ` Kamble, Sagar A
2016-05-31 11:38 ` ✗ Ro.CI.BAT: warning for series starting with [v4,1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled (rev5) Patchwork
2016-05-31 15:15   ` Kamble, Sagar A

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