[PATCH] Runtime: set the sub slice according to kernel pooled EU configure.

[PATCH] Runtime: set the sub slice according to kernel pooled EU configure.

[Yang Rong]

If BXT pooled EU enable, the 3*6 EUs is split into 2 pooled, so change
the sub slice to 2.
For min no. of eu in pool, only affact fused down 2*6 BXT devices,
because beignet don't support these devices now, add assert only.
assert.

This patch is based on kernel patch: https://patchwork.freedesktop.org/series/8200/
Thanks Arun.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
---
 CMakeLists.txt           | 12 ++++++++++++
 src/CMakeLists.txt       | 10 ++++++++++
 src/intel/intel_driver.c | 15 +++++++++++++++
 3 files changed, 37 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index fae3e88..af684ed 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -153,6 +153,18 @@ IF(DRM_INTEL_FOUND)
   ELSE(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
     MESSAGE(STATUS "Disable subslice total query support")
   ENDIF(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
+  CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_pooled_eu" "" HAVE_DRM_INTEL_POOLED_EU)
+  IF(HAVE_DRM_INTEL_POOLED_EU)
+    MESSAGE(STATUS "Enable pooled eu query support")
+  ELSE(HAVE_DRM_INTEL_POOLED_EU)
+    MESSAGE(STATUS "Disable pooled eu query support")
+  ENDIF(HAVE_DRM_INTEL_POOLED_EU)
+  CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_min_eu_in_pool" "" HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+  IF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+    MESSAGE(STATUS "Enable min eu in pool query support")
+  ELSE(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+    MESSAGE(STATUS "Disable min eu in pool query support")
+  ENDIF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
 ELSE(DRM_INTEL_FOUND)
   MESSAGE(FATAL_ERROR "Looking for DRM Intel (>= 2.4.52) - not found")
 ENDIF(DRM_INTEL_FOUND)
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 98f8423..a002865 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -138,6 +138,16 @@ if (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
   SET(CMAKE_C_FLAGS "-DHAS_SUBSLICE_TOTAL ${CMAKE_C_FLAGS}")
 endif (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
 
+if (HAVE_DRM_INTEL_POOLED_EU)
+  SET(CMAKE_CXX_FLAGS "-DHAS_POOLED_EU ${CMAKE_CXX_FLAGS}")
+  SET(CMAKE_C_FLAGS "-DHAS_POOLED_EU ${CMAKE_C_FLAGS}")
+endif (HAVE_DRM_INTEL_POOLED_EU)
+
+if (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+  SET(CMAKE_CXX_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_CXX_FLAGS}")
+  SET(CMAKE_C_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_C_FLAGS}")
+endif (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
+
 set(GIT_SHA1 "git_sha1.h")
 add_custom_target(${GIT_SHA1} ALL
   COMMAND chmod +x ${CMAKE_CURRENT_SOURCE_DIR}/git_sha1.sh
diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
index 03d9d34..8f2373b 100644
--- a/src/intel/intel_driver.c
+++ b/src/intel/intel_driver.c
@@ -882,6 +882,21 @@ intel_update_device_info(cl_device_id device)
 #endif
   }
 #endif
+
+#ifdef HAS_POOLED_EU
+  /* BXT pooled eu, 3*6 to 2*9, like sub slice count is 2 */
+  unsigned int has_pooled_eu = 0;
+  if(!drm_intel_get_pooled_eu(driver->fd, &has_pooled_eu) && has_pooled_eu)
+    device->sub_slice_count = 2;
+
+#ifdef HAS_MIN_EU_IN_POOL
+  unsigned int min_eu;
+  /* for fused down 2x6 devices, beignet don't support. */
+  if (has_pooled_eu && !drm_intel_get_min_eu_in_pool(driver->fd, &min_eu)) {
+    assert(min_eu == 9); //don't support fuse down device.
+  }
+#endif //HAS_MIN_EU_IN_POOL
+#endif //HAS_POOLED_EU
   //We should get the device memory dynamically, but the
   //mapablce mem size usage is unknown. Just ignore it.
   size_t total_mem,map_mem;
-- 
2.1.4

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[PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Yang Rong]

Update kernel interface with new I915_GETPARAM ioctl entries for
pooled EU and min no. of eus in a pool. Add a wrapping function
for each parameter. Userspace drivers need these values when decide
the thread count. This kernel enabled pooled eu by default for BXT
and for fused down 2x6 parts it is advised to turn it off.

But there is another HW issue in these parts (fused
down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
workaround. In this case the pool configuration changes depending upon
which subslice is disabled and the no. of eus in a pool is different,
So userspace need to know min no. of eus in a pool.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
---
 include/drm/i915_drm.h   |  2 ++
 intel/intel_bufmgr.h     |  3 +++
 intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 37 insertions(+)

diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index c4ce6b2..eb611a7 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_GPU_RESET	 35
 #define I915_PARAM_HAS_RESOURCE_STREAMER 36
 #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
+#define I915_PARAM_HAS_POOLED_EU         38
+#define I915_PARAM_MIN_EU_IN_POOL        39
 
 typedef struct drm_i915_getparam {
 	__s32 param;
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index a1abbcd..8370694 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
 int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
 
+int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu);
+int drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu);
+
 /** @{ Compatibility defines to keep old code building despite the symbol rename
  * from dri_* to drm_intel_*
  */
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 0a4012b..b8bb654 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int *eu_total)
 	return 0;
 }
 
+int
+drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	memclear(gp);
+	gp.value = (int*)has_pooled_eu;
+	gp.param = I915_PARAM_HAS_POOLED_EU;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
+int
+drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	memclear(gp);
+	gp.value = (int*)min_eu;
+	gp.param = I915_PARAM_MIN_EU_IN_POOL;
+	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	if (ret)
+		return -errno;
+
+	return 0;
+}
+
 /**
  * Annotate the given bo for use in aub dumping.
  *
-- 
2.1.4

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Re: [PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Arun Siluvery]

On 15/06/2016 13:49, Yang Rong wrote:
> Update kernel interface with new I915_GETPARAM ioctl entries for
> pooled EU and min no. of eus in a pool. Add a wrapping function
> for each parameter. Userspace drivers need these values when decide
> the thread count. This kernel enabled pooled eu by default for BXT
> and for fused down 2x6 parts it is advised to turn it off.
>
> But there is another HW issue in these parts (fused
> down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
> workaround. In this case the pool configuration changes depending upon
> which subslice is disabled and the no. of eus in a pool is different,
> So userspace need to know min no. of eus in a pool.
>
> Signed-off-by: Yang Rong <rong.r.yang@intel.com>
> ---
>   include/drm/i915_drm.h   |  2 ++
>   intel/intel_bufmgr.h     |  3 +++
>   intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++
>   3 files changed, 37 insertions(+)
>
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index c4ce6b2..eb611a7 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
>   #define I915_PARAM_HAS_GPU_RESET	 35
>   #define I915_PARAM_HAS_RESOURCE_STREAMER 36
>   #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
> +#define I915_PARAM_HAS_POOLED_EU         38
> +#define I915_PARAM_MIN_EU_IN_POOL        39
>

Please note that these are not yet added in kernel because opensource 
user is required to merge kernel support.

At the moment kernel bits are separated and are merged, only thing 
remaining is to export these getparam ioctls which can be done once 
userspace is available which is the current set of patches.

Once these patches are reviewed then I can export them from kernel side 
also.

regards
Arun

>   typedef struct drm_i915_getparam {
>   	__s32 param;
> diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
> index a1abbcd..8370694 100644
> --- a/intel/intel_bufmgr.h
> +++ b/intel/intel_bufmgr.h
> @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
>   int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
>   int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
>
> +int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu);
> +int drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu);
> +
>   /** @{ Compatibility defines to keep old code building despite the symbol rename
>    * from dri_* to drm_intel_*
>    */
> diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
> index 0a4012b..b8bb654 100644
> --- a/intel/intel_bufmgr_gem.c
> +++ b/intel/intel_bufmgr_gem.c
> @@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int *eu_total)
>   	return 0;
>   }
>
> +int
> +drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu)
> +{
> +	drm_i915_getparam_t gp;
> +	int ret;
> +
> +	memclear(gp);
> +	gp.value = (int*)has_pooled_eu;
> +	gp.param = I915_PARAM_HAS_POOLED_EU;
> +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +	if (ret)
> +		return -errno;
> +
> +	return 0;
> +}
> +
> +int
> +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu)
> +{
> +	drm_i915_getparam_t gp;
> +	int ret;
> +
> +	memclear(gp);
> +	gp.value = (int*)min_eu;
> +	gp.param = I915_PARAM_MIN_EU_IN_POOL;
> +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +	if (ret)
> +		return -errno;
> +
> +	return 0;
> +}
> +
>   /**
>    * Annotate the given bo for use in aub dumping.
>    *
>

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Re: [PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Yang, Rong R]

Hi, Arun,

    Beignet patch is reviewed by ruiling, can you have to export them?

Thanks,
Yang Rong

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces@lists.freedesktop.org] On Behalf Of
> Arun Siluvery
> Sent: Wednesday, June 15, 2016 16:17
> To: Yang, Rong R <rong.r.yang@intel.com>; beignet@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH] intel: Export pooled EU and min no. of eus in a
> pool.
> 
> On 15/06/2016 13:49, Yang Rong wrote:
> > Update kernel interface with new I915_GETPARAM ioctl entries for
> > pooled EU and min no. of eus in a pool. Add a wrapping function for
> > each parameter. Userspace drivers need these values when decide the
> > thread count. This kernel enabled pooled eu by default for BXT and for
> > fused down 2x6 parts it is advised to turn it off.
> >
> > But there is another HW issue in these parts (fused down 2x6 parts)
> > before C0 that requires Pooled EU to be enabled as a workaround. In
> > this case the pool configuration changes depending upon which subslice
> > is disabled and the no. of eus in a pool is different, So userspace
> > need to know min no. of eus in a pool.
> >
> > Signed-off-by: Yang Rong <rong.r.yang@intel.com>
> > ---
> >   include/drm/i915_drm.h   |  2 ++
> >   intel/intel_bufmgr.h     |  3 +++
> >   intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++
> >   3 files changed, 37 insertions(+)
> >
> > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
> > c4ce6b2..eb611a7 100644
> > --- a/include/drm/i915_drm.h
> > +++ b/include/drm/i915_drm.h
> > @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
> >   #define I915_PARAM_HAS_GPU_RESET	 35
> >   #define I915_PARAM_HAS_RESOURCE_STREAMER 36
> >   #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
> > +#define I915_PARAM_HAS_POOLED_EU         38
> > +#define I915_PARAM_MIN_EU_IN_POOL        39
> >
> 
> Please note that these are not yet added in kernel because opensource user
> is required to merge kernel support.
> 
> At the moment kernel bits are separated and are merged, only thing
> remaining is to export these getparam ioctls which can be done once
> userspace is available which is the current set of patches.
> 
> Once these patches are reviewed then I can export them from kernel side
> also.
> 
> regards
> Arun
> 
> >   typedef struct drm_i915_getparam {
> >   	__s32 param;
> > diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index
> > a1abbcd..8370694 100644
> > --- a/intel/intel_bufmgr.h
> > +++ b/intel/intel_bufmgr.h
> > @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context
> *ctx,
> >   int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
> >   int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
> >
> > +int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu); int
> > +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu);
> > +
> >   /** @{ Compatibility defines to keep old code building despite the symbol
> rename
> >    * from dri_* to drm_intel_*
> >    */
> > diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index
> > 0a4012b..b8bb654 100644
> > --- a/intel/intel_bufmgr_gem.c
> > +++ b/intel/intel_bufmgr_gem.c
> > @@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int
> *eu_total)
> >   	return 0;
> >   }
> >
> > +int
> > +drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu) {
> > +	drm_i915_getparam_t gp;
> > +	int ret;
> > +
> > +	memclear(gp);
> > +	gp.value = (int*)has_pooled_eu;
> > +	gp.param = I915_PARAM_HAS_POOLED_EU;
> > +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +	if (ret)
> > +		return -errno;
> > +
> > +	return 0;
> > +}
> > +
> > +int
> > +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu) {
> > +	drm_i915_getparam_t gp;
> > +	int ret;
> > +
> > +	memclear(gp);
> > +	gp.value = (int*)min_eu;
> > +	gp.param = I915_PARAM_MIN_EU_IN_POOL;
> > +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +	if (ret)
> > +		return -errno;
> > +
> > +	return 0;
> > +}
> > +
> >   /**
> >    * Annotate the given bo for use in aub dumping.
> >    *
> >
> 
> _______________________________________________
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> Beignet@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/beignet
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Re: [Beignet] [PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Arun Siluvery]

On 30/06/2016 09:58, Yang, Rong R wrote:
> Hi, Arun,
>
>      Beignet patch is reviewed by ruiling, can you have to export them?
>

Thanks for the update, I will send kernel patches to export them.

regards
Arun

> Thanks,
> Yang Rong
>
>> -----Original Message-----
>> From: Beignet [mailto:beignet-bounces@lists.freedesktop.org] On Behalf Of
>> Arun Siluvery
>> Sent: Wednesday, June 15, 2016 16:17
>> To: Yang, Rong R <rong.r.yang@intel.com>; beignet@lists.freedesktop.org;
>> intel-gfx@lists.freedesktop.org
>> Subject: Re: [Beignet] [PATCH] intel: Export pooled EU and min no. of eus in a
>> pool.
>>
>> On 15/06/2016 13:49, Yang Rong wrote:
>>> Update kernel interface with new I915_GETPARAM ioctl entries for
>>> pooled EU and min no. of eus in a pool. Add a wrapping function for
>>> each parameter. Userspace drivers need these values when decide the
>>> thread count. This kernel enabled pooled eu by default for BXT and for
>>> fused down 2x6 parts it is advised to turn it off.
>>>
>>> But there is another HW issue in these parts (fused down 2x6 parts)
>>> before C0 that requires Pooled EU to be enabled as a workaround. In
>>> this case the pool configuration changes depending upon which subslice
>>> is disabled and the no. of eus in a pool is different, So userspace
>>> need to know min no. of eus in a pool.
>>>
>>> Signed-off-by: Yang Rong <rong.r.yang@intel.com>
>>> ---
>>>    include/drm/i915_drm.h   |  2 ++
>>>    intel/intel_bufmgr.h     |  3 +++
>>>    intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++
>>>    3 files changed, 37 insertions(+)
>>>
>>> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
>>> c4ce6b2..eb611a7 100644
>>> --- a/include/drm/i915_drm.h
>>> +++ b/include/drm/i915_drm.h
>>> @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
>>>    #define I915_PARAM_HAS_GPU_RESET	 35
>>>    #define I915_PARAM_HAS_RESOURCE_STREAMER 36
>>>    #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
>>> +#define I915_PARAM_HAS_POOLED_EU         38
>>> +#define I915_PARAM_MIN_EU_IN_POOL        39
>>>
>>
>> Please note that these are not yet added in kernel because opensource user
>> is required to merge kernel support.
>>
>> At the moment kernel bits are separated and are merged, only thing
>> remaining is to export these getparam ioctls which can be done once
>> userspace is available which is the current set of patches.
>>
>> Once these patches are reviewed then I can export them from kernel side
>> also.
>>
>> regards
>> Arun
>>
>>>    typedef struct drm_i915_getparam {
>>>    	__s32 param;
>>> diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index
>>> a1abbcd..8370694 100644
>>> --- a/intel/intel_bufmgr.h
>>> +++ b/intel/intel_bufmgr.h
>>> @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context
>> *ctx,
>>>    int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
>>>    int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
>>>
>>> +int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu); int
>>> +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu);
>>> +
>>>    /** @{ Compatibility defines to keep old code building despite the symbol
>> rename
>>>     * from dri_* to drm_intel_*
>>>     */
>>> diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index
>>> 0a4012b..b8bb654 100644
>>> --- a/intel/intel_bufmgr_gem.c
>>> +++ b/intel/intel_bufmgr_gem.c
>>> @@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int
>> *eu_total)
>>>    	return 0;
>>>    }
>>>
>>> +int
>>> +drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu) {
>>> +	drm_i915_getparam_t gp;
>>> +	int ret;
>>> +
>>> +	memclear(gp);
>>> +	gp.value = (int*)has_pooled_eu;
>>> +	gp.param = I915_PARAM_HAS_POOLED_EU;
>>> +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>> +	if (ret)
>>> +		return -errno;
>>> +
>>> +	return 0;
>>> +}
>>> +
>>> +int
>>> +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu) {
>>> +	drm_i915_getparam_t gp;
>>> +	int ret;
>>> +
>>> +	memclear(gp);
>>> +	gp.value = (int*)min_eu;
>>> +	gp.param = I915_PARAM_MIN_EU_IN_POOL;
>>> +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>> +	if (ret)
>>> +		return -errno;
>>> +
>>> +	return 0;
>>> +}
>>> +
>>>    /**
>>>     * Annotate the given bo for use in aub dumping.
>>>     *
>>>
>>
>> _______________________________________________
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>> Beignet@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/beignet
> _______________________________________________
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>

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Re: [PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Arun Siluvery]

On 15/06/2016 09:19, Yang Rong wrote:
> Update kernel interface with new I915_GETPARAM ioctl entries for
> pooled EU and min no. of eus in a pool. Add a wrapping function
> for each parameter. Userspace drivers need these values when decide
> the thread count. This kernel enabled pooled eu by default for BXT
> and for fused down 2x6 parts it is advised to turn it off.
>
> But there is another HW issue in these parts (fused
> down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
> workaround. In this case the pool configuration changes depending upon
> which subslice is disabled and the no. of eus in a pool is different,
> So userspace need to know min no. of eus in a pool.
>
> Signed-off-by: Yang Rong <rong.r.yang@intel.com>
> ---
>   include/drm/i915_drm.h   |  2 ++
>   intel/intel_bufmgr.h     |  3 +++
>   intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++
>   3 files changed, 37 insertions(+)
>
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index c4ce6b2..eb611a7 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
>   #define I915_PARAM_HAS_GPU_RESET	 35
>   #define I915_PARAM_HAS_RESOURCE_STREAMER 36
>   #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
> +#define I915_PARAM_HAS_POOLED_EU         38
> +#define I915_PARAM_MIN_EU_IN_POOL        39
>

Is this patch meant for libdrm or is there a i915_drm.h included in 
beignet? would you be sending a patch to libdrm?

Please note that these are now added to kernel so userspace can start 
using them.

Please let me know when these changes are going to be merged to beignet 
repo.

regards
Arun

>   typedef struct drm_i915_getparam {
>   	__s32 param;
> diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
> index a1abbcd..8370694 100644
> --- a/intel/intel_bufmgr.h
> +++ b/intel/intel_bufmgr.h
> @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
>   int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
>   int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
>
> +int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu);
> +int drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu);
> +
>   /** @{ Compatibility defines to keep old code building despite the symbol rename
>    * from dri_* to drm_intel_*
>    */
> diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
> index 0a4012b..b8bb654 100644
> --- a/intel/intel_bufmgr_gem.c
> +++ b/intel/intel_bufmgr_gem.c
> @@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int *eu_total)
>   	return 0;
>   }
>
> +int
> +drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu)
> +{
> +	drm_i915_getparam_t gp;
> +	int ret;
> +
> +	memclear(gp);
> +	gp.value = (int*)has_pooled_eu;
> +	gp.param = I915_PARAM_HAS_POOLED_EU;
> +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +	if (ret)
> +		return -errno;
> +
> +	return 0;
> +}
> +
> +int
> +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu)
> +{
> +	drm_i915_getparam_t gp;
> +	int ret;
> +
> +	memclear(gp);
> +	gp.value = (int*)min_eu;
> +	gp.param = I915_PARAM_MIN_EU_IN_POOL;
> +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +	if (ret)
> +		return -errno;
> +
> +	return 0;
> +}
> +
>   /**
>    * Annotate the given bo for use in aub dumping.
>    *
>

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Re: [PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Yang, Rong R]

Yes, it is libdrm patch. I have merged the beignet patch right now, but still depend on the libdrm patch, I will resend it to libdrm now. Thanks.

> -----Original Message-----
> From: Arun Siluvery [mailto:arun.siluvery@linux.intel.com]
> Sent: Tuesday, July 5, 2016 18:01
> To: Yang, Rong R <rong.r.yang@intel.com>; beignet@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] intel: Export pooled EU and min no. of eus in a pool.
> 
> On 15/06/2016 09:19, Yang Rong wrote:
> > Update kernel interface with new I915_GETPARAM ioctl entries for
> > pooled EU and min no. of eus in a pool. Add a wrapping function for
> > each parameter. Userspace drivers need these values when decide the
> > thread count. This kernel enabled pooled eu by default for BXT and for
> > fused down 2x6 parts it is advised to turn it off.
> >
> > But there is another HW issue in these parts (fused down 2x6 parts)
> > before C0 that requires Pooled EU to be enabled as a workaround. In
> > this case the pool configuration changes depending upon which subslice
> > is disabled and the no. of eus in a pool is different, So userspace
> > need to know min no. of eus in a pool.
> >
> > Signed-off-by: Yang Rong <rong.r.yang@intel.com>
> > ---
> >   include/drm/i915_drm.h   |  2 ++
> >   intel/intel_bufmgr.h     |  3 +++
> >   intel/intel_bufmgr_gem.c | 32 ++++++++++++++++++++++++++++++++
> >   3 files changed, 37 insertions(+)
> >
> > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
> > c4ce6b2..eb611a7 100644
> > --- a/include/drm/i915_drm.h
> > +++ b/include/drm/i915_drm.h
> > @@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
> >   #define I915_PARAM_HAS_GPU_RESET	 35
> >   #define I915_PARAM_HAS_RESOURCE_STREAMER 36
> >   #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
> > +#define I915_PARAM_HAS_POOLED_EU         38
> > +#define I915_PARAM_MIN_EU_IN_POOL        39
> >
> 
> Is this patch meant for libdrm or is there a i915_drm.h included in beignet?
> would you be sending a patch to libdrm?
> 
> Please note that these are now added to kernel so userspace can start using
> them.
> 
> Please let me know when these changes are going to be merged to beignet
> repo.
> 
> regards
> Arun
> 
> >   typedef struct drm_i915_getparam {
> >   	__s32 param;
> > diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index
> > a1abbcd..8370694 100644
> > --- a/intel/intel_bufmgr.h
> > +++ b/intel/intel_bufmgr.h
> > @@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context
> *ctx,
> >   int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
> >   int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
> >
> > +int drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu); int
> > +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu);
> > +
> >   /** @{ Compatibility defines to keep old code building despite the symbol
> rename
> >    * from dri_* to drm_intel_*
> >    */
> > diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index
> > 0a4012b..b8bb654 100644
> > --- a/intel/intel_bufmgr_gem.c
> > +++ b/intel/intel_bufmgr_gem.c
> > @@ -3237,6 +3237,38 @@ drm_intel_get_eu_total(int fd, unsigned int
> *eu_total)
> >   	return 0;
> >   }
> >
> > +int
> > +drm_intel_get_pooled_eu(int fd, unsigned int *has_pooled_eu) {
> > +	drm_i915_getparam_t gp;
> > +	int ret;
> > +
> > +	memclear(gp);
> > +	gp.value = (int*)has_pooled_eu;
> > +	gp.param = I915_PARAM_HAS_POOLED_EU;
> > +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +	if (ret)
> > +		return -errno;
> > +
> > +	return 0;
> > +}
> > +
> > +int
> > +drm_intel_get_min_eu_in_pool(int fd, unsigned int *min_eu) {
> > +	drm_i915_getparam_t gp;
> > +	int ret;
> > +
> > +	memclear(gp);
> > +	gp.value = (int*)min_eu;
> > +	gp.param = I915_PARAM_MIN_EU_IN_POOL;
> > +	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +	if (ret)
> > +		return -errno;
> > +
> > +	return 0;
> > +}
> > +
> >   /**
> >    * Annotate the given bo for use in aub dumping.
> >    *
> >

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Beignet@lists.freedesktop.org
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✗ Ro.CI.BAT: failure for Runtime: set the sub slice according to kernel pooled EU configure.

[Patchwork]

== Series Details ==

Series: Runtime: set the sub slice according to kernel pooled EU configure.
URL   : https://patchwork.freedesktop.org/series/8724/
State : failure

== Summary ==

Applying: Runtime: set the sub slice according to kernel pooled EU configure.
fatal: sha1 information is lacking or useless (CMakeLists.txt).
error: could not build fake ancestor
Patch failed at 0001 Runtime: set the sub slice according to kernel pooled EU configure.
The copy of the patch that failed is found in: .git/rebase-apply/patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

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Re: [PATCH] Runtime: set the sub slice according to kernel pooled EU configure.

[Song, Ruiling]

LGTM

Ruiling

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> Yang Rong
> Sent: Wednesday, June 15, 2016 4:20 PM
> To: beignet@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
> arun.siluvery@linux.intel.com
> Subject: [Intel-gfx] [PATCH] Runtime: set the sub slice according to kernel
> pooled EU configure.
> 
> If BXT pooled EU enable, the 3*6 EUs is split into 2 pooled, so change
> the sub slice to 2.
> For min no. of eu in pool, only affact fused down 2*6 BXT devices,
> because beignet don't support these devices now, add assert only.
> assert.
> 
> This patch is based on kernel patch:
> https://patchwork.freedesktop.org/series/8200/
> Thanks Arun.
> 
> Signed-off-by: Yang Rong <rong.r.yang@intel.com>
> ---
>  CMakeLists.txt           | 12 ++++++++++++
>  src/CMakeLists.txt       | 10 ++++++++++
>  src/intel/intel_driver.c | 15 +++++++++++++++
>  3 files changed, 37 insertions(+)
> 
> diff --git a/CMakeLists.txt b/CMakeLists.txt
> index fae3e88..af684ed 100644
> --- a/CMakeLists.txt
> +++ b/CMakeLists.txt
> @@ -153,6 +153,18 @@ IF(DRM_INTEL_FOUND)
>    ELSE(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
>      MESSAGE(STATUS "Disable subslice total query support")
>    ENDIF(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
> +  CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_pooled_eu" ""
> HAVE_DRM_INTEL_POOLED_EU)
> +  IF(HAVE_DRM_INTEL_POOLED_EU)
> +    MESSAGE(STATUS "Enable pooled eu query support")
> +  ELSE(HAVE_DRM_INTEL_POOLED_EU)
> +    MESSAGE(STATUS "Disable pooled eu query support")
> +  ENDIF(HAVE_DRM_INTEL_POOLED_EU)
> +  CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_min_eu_in_pool" ""
> HAVE_DRM_INTEL_MIN_EU_IN_POOL)
> +  IF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
> +    MESSAGE(STATUS "Enable min eu in pool query support")
> +  ELSE(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
> +    MESSAGE(STATUS "Disable min eu in pool query support")
> +  ENDIF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>  ELSE(DRM_INTEL_FOUND)
>    MESSAGE(FATAL_ERROR "Looking for DRM Intel (>= 2.4.52) - not found")
>  ENDIF(DRM_INTEL_FOUND)
> diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
> index 98f8423..a002865 100644
> --- a/src/CMakeLists.txt
> +++ b/src/CMakeLists.txt
> @@ -138,6 +138,16 @@ if (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
>    SET(CMAKE_C_FLAGS "-DHAS_SUBSLICE_TOTAL ${CMAKE_C_FLAGS}")
>  endif (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
> 
> +if (HAVE_DRM_INTEL_POOLED_EU)
> +  SET(CMAKE_CXX_FLAGS "-DHAS_POOLED_EU ${CMAKE_CXX_FLAGS}")
> +  SET(CMAKE_C_FLAGS "-DHAS_POOLED_EU ${CMAKE_C_FLAGS}")
> +endif (HAVE_DRM_INTEL_POOLED_EU)
> +
> +if (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
> +  SET(CMAKE_CXX_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_CXX_FLAGS}")
> +  SET(CMAKE_C_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_C_FLAGS}")
> +endif (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
> +
>  set(GIT_SHA1 "git_sha1.h")
>  add_custom_target(${GIT_SHA1} ALL
>    COMMAND chmod +x ${CMAKE_CURRENT_SOURCE_DIR}/git_sha1.sh
> diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
> index 03d9d34..8f2373b 100644
> --- a/src/intel/intel_driver.c
> +++ b/src/intel/intel_driver.c
> @@ -882,6 +882,21 @@ intel_update_device_info(cl_device_id device)
>  #endif
>    }
>  #endif
> +
> +#ifdef HAS_POOLED_EU
> +  /* BXT pooled eu, 3*6 to 2*9, like sub slice count is 2 */
> +  unsigned int has_pooled_eu = 0;
> +  if(!drm_intel_get_pooled_eu(driver->fd, &has_pooled_eu) && has_pooled_eu)
> +    device->sub_slice_count = 2;
> +
> +#ifdef HAS_MIN_EU_IN_POOL
> +  unsigned int min_eu;
> +  /* for fused down 2x6 devices, beignet don't support. */
> +  if (has_pooled_eu && !drm_intel_get_min_eu_in_pool(driver->fd, &min_eu)) {
> +    assert(min_eu == 9); //don't support fuse down device.
> +  }
> +#endif //HAS_MIN_EU_IN_POOL
> +#endif //HAS_POOLED_EU
>    //We should get the device memory dynamically, but the
>    //mapablce mem size usage is unknown. Just ignore it.
>    size_t total_mem,map_mem;
> --
> 2.1.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH] Runtime: set the sub slice according to kernel pooled EU configure.

[Arun Siluvery]

On 30/06/2016 09:43, Song, Ruiling wrote:
> LGTM
>
> Ruiling

Could you please let me know whether these patches are merged/yet to be 
merged?

I have submitted kernel patch which is ready to be merged but we would 
like to know if userspace bits are merged or not?

https://lists.freedesktop.org/archives/intel-gfx/2016-July/099822.html

regards
Arun

>
>> -----Original Message-----
>> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
>> Yang Rong
>> Sent: Wednesday, June 15, 2016 4:20 PM
>> To: beignet@lists.freedesktop.org; intel-gfx@lists.freedesktop.org;
>> arun.siluvery@linux.intel.com
>> Subject: [Intel-gfx] [PATCH] Runtime: set the sub slice according to kernel
>> pooled EU configure.
>>
>> If BXT pooled EU enable, the 3*6 EUs is split into 2 pooled, so change
>> the sub slice to 2.
>> For min no. of eu in pool, only affact fused down 2*6 BXT devices,
>> because beignet don't support these devices now, add assert only.
>> assert.
>>
>> This patch is based on kernel patch:
>> https://patchwork.freedesktop.org/series/8200/
>> Thanks Arun.
>>
>> Signed-off-by: Yang Rong <rong.r.yang@intel.com>
>> ---
>>   CMakeLists.txt           | 12 ++++++++++++
>>   src/CMakeLists.txt       | 10 ++++++++++
>>   src/intel/intel_driver.c | 15 +++++++++++++++
>>   3 files changed, 37 insertions(+)
>>
>> diff --git a/CMakeLists.txt b/CMakeLists.txt
>> index fae3e88..af684ed 100644
>> --- a/CMakeLists.txt
>> +++ b/CMakeLists.txt
>> @@ -153,6 +153,18 @@ IF(DRM_INTEL_FOUND)
>>     ELSE(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
>>       MESSAGE(STATUS "Disable subslice total query support")
>>     ENDIF(HAVE_DRM_INTEL_SUBSLICE_TOTAL)
>> +  CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_pooled_eu" ""
>> HAVE_DRM_INTEL_POOLED_EU)
>> +  IF(HAVE_DRM_INTEL_POOLED_EU)
>> +    MESSAGE(STATUS "Enable pooled eu query support")
>> +  ELSE(HAVE_DRM_INTEL_POOLED_EU)
>> +    MESSAGE(STATUS "Disable pooled eu query support")
>> +  ENDIF(HAVE_DRM_INTEL_POOLED_EU)
>> +  CHECK_LIBRARY_EXISTS(drm_intel "drm_intel_get_min_eu_in_pool" ""
>> HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>> +  IF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>> +    MESSAGE(STATUS "Enable min eu in pool query support")
>> +  ELSE(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>> +    MESSAGE(STATUS "Disable min eu in pool query support")
>> +  ENDIF(HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>>   ELSE(DRM_INTEL_FOUND)
>>     MESSAGE(FATAL_ERROR "Looking for DRM Intel (>= 2.4.52) - not found")
>>   ENDIF(DRM_INTEL_FOUND)
>> diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
>> index 98f8423..a002865 100644
>> --- a/src/CMakeLists.txt
>> +++ b/src/CMakeLists.txt
>> @@ -138,6 +138,16 @@ if (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
>>     SET(CMAKE_C_FLAGS "-DHAS_SUBSLICE_TOTAL ${CMAKE_C_FLAGS}")
>>   endif (HAVE_DRM_INTEL_SUBSLICE_TOTAL)
>>
>> +if (HAVE_DRM_INTEL_POOLED_EU)
>> +  SET(CMAKE_CXX_FLAGS "-DHAS_POOLED_EU ${CMAKE_CXX_FLAGS}")
>> +  SET(CMAKE_C_FLAGS "-DHAS_POOLED_EU ${CMAKE_C_FLAGS}")
>> +endif (HAVE_DRM_INTEL_POOLED_EU)
>> +
>> +if (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>> +  SET(CMAKE_CXX_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_CXX_FLAGS}")
>> +  SET(CMAKE_C_FLAGS "-DHAS_MIN_EU_IN_POOL ${CMAKE_C_FLAGS}")
>> +endif (HAVE_DRM_INTEL_MIN_EU_IN_POOL)
>> +
>>   set(GIT_SHA1 "git_sha1.h")
>>   add_custom_target(${GIT_SHA1} ALL
>>     COMMAND chmod +x ${CMAKE_CURRENT_SOURCE_DIR}/git_sha1.sh
>> diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
>> index 03d9d34..8f2373b 100644
>> --- a/src/intel/intel_driver.c
>> +++ b/src/intel/intel_driver.c
>> @@ -882,6 +882,21 @@ intel_update_device_info(cl_device_id device)
>>   #endif
>>     }
>>   #endif
>> +
>> +#ifdef HAS_POOLED_EU
>> +  /* BXT pooled eu, 3*6 to 2*9, like sub slice count is 2 */
>> +  unsigned int has_pooled_eu = 0;
>> +  if(!drm_intel_get_pooled_eu(driver->fd, &has_pooled_eu) && has_pooled_eu)
>> +    device->sub_slice_count = 2;
>> +
>> +#ifdef HAS_MIN_EU_IN_POOL
>> +  unsigned int min_eu;
>> +  /* for fused down 2x6 devices, beignet don't support. */
>> +  if (has_pooled_eu && !drm_intel_get_min_eu_in_pool(driver->fd, &min_eu)) {
>> +    assert(min_eu == 9); //don't support fuse down device.
>> +  }
>> +#endif //HAS_MIN_EU_IN_POOL
>> +#endif //HAS_POOLED_EU
>>     //We should get the device memory dynamically, but the
>>     //mapablce mem size usage is unknown. Just ignore it.
>>     size_t total_mem,map_mem;
>> --
>> 2.1.4
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>

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[PATCH] intel: Export pooled EU and min no. of eus in a pool.

[Yang Rong]

Update kernel interface with new I915_GETPARAM ioctl entries for
pooled EU and min no. of eus in a pool. Add a wrapping function
for each parameter. Userspace drivers need these values when decide
the thread count. This kernel enabled pooled eu by default for BXT
and for fused down 2x6 parts it is advised to turn it off.

But there is another HW issue in these parts (fused
down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
workaround. In this case the pool configuration changes depending upon
which subslice is disabled and the no. of eus in a pool is different,
So userspace need to know min no. of eus in a pool.

V2: use return value as the query results.
    ret < 0 when error, ret = 0 when not support, and ret > 0 indicate
    query results.(Chris)
V3: Correct V2 errors.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
---
 include/drm/i915_drm.h   |  2 ++
 intel/intel_bufmgr.h     |  3 +++
 intel/intel_bufmgr_gem.c | 30 ++++++++++++++++++++++++++++++
 3 files changed, 35 insertions(+)

diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index c4ce6b2..eb611a7 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_HAS_GPU_RESET	 35
 #define I915_PARAM_HAS_RESOURCE_STREAMER 36
 #define I915_PARAM_HAS_EXEC_SOFTPIN	 37
+#define I915_PARAM_HAS_POOLED_EU         38
+#define I915_PARAM_MIN_EU_IN_POOL        39
 
 typedef struct drm_i915_getparam {
 	__s32 param;
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index a1abbcd..96a4d9d 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -273,6 +273,9 @@ int drm_intel_get_reset_stats(drm_intel_context *ctx,
 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
 int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
 
+int drm_intel_get_pooled_eu(int fd);
+int drm_intel_get_min_eu_in_pool(int fd);
+
 /** @{ Compatibility defines to keep old code building despite the symbol rename
  * from dri_* to drm_intel_*
  */
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 0a4012b..b0a0eb9 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -3237,6 +3237,36 @@ drm_intel_get_eu_total(int fd, unsigned int *eu_total)
 	return 0;
 }
 
+int
+drm_intel_get_pooled_eu(int fd)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	memclear(gp);
+	gp.param = I915_PARAM_HAS_POOLED_EU;
+	gp.value = &ret;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
+		return -errno;
+
+	return ret;
+}
+
+int
+drm_intel_get_min_eu_in_pool(int fd)
+{
+	drm_i915_getparam_t gp;
+	int ret;
+
+	memclear(gp);
+	gp.param = I915_PARAM_MIN_EU_IN_POOL;
+	gp.value = &ret;
+	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
+		return -errno;
+
+	return ret;
+}
+
 /**
  * Annotate the given bo for use in aub dumping.
  *
-- 
2.1.4

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