From: "Kamble, Sagar A" <sagar.a.kamble@intel.com>
To: tim.gore@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915:gen9: restrict WaC6DisallowByGfxPause
Date: Tue, 19 Jul 2016 12:26:05 +0530 [thread overview]
Message-ID: <578DCF05.8030103@intel.com> (raw)
In-Reply-To: <1468590566-14951-1-git-send-email-tim.gore@intel.com>
On 7/15/2016 7:19 PM, tim.gore@intel.com wrote:
> From: Tim Gore <tim.gore@intel.com>
>
> WaC6DisallowByGfxPause is currently applied unconditionally
> but is not required in all revisions.
>
> References: HSD#2133391
> Signed-off-by: Tim Gore <tim.gore@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc_loader.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 605c696..173dcef 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
> }
>
> /* WaC6DisallowByGfxPause*/
> - I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
> + if (IS_SKL_REVID(dev, 0, SKL_REVID_B0) ||
> + IS_BXT_REVID(dev, 0, BXT_REVID_A1))
I see this is applicable till BXT B0 and SKL C0 in wa_database. Am I
missing something?
> + I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
>
> if (IS_BROXTON(dev))
> I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
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next prev parent reply other threads:[~2016-07-19 6:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-15 13:49 [PATCH] drm/i915:gen9: restrict WaC6DisallowByGfxPause tim.gore
2016-07-15 14:12 ` ✗ Ro.CI.BAT: failure for " Patchwork
2016-07-19 6:56 ` Kamble, Sagar A [this message]
2016-07-19 9:56 ` [PATCH] " Gore, Tim
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