From: "Kamble, Sagar A" <sagar.a.kamble@intel.com>
To: tim.gore@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915:gen9: restrict WaC6DisallowByGfxPause
Date: Thu, 21 Jul 2016 08:30:43 +0530 [thread overview]
Message-ID: <57903ADB.1020603@intel.com> (raw)
In-Reply-To: <1469008825-19442-1-git-send-email-tim.gore@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
On 7/20/2016 3:30 PM, tim.gore@intel.com wrote:
> From: Tim Gore <tim.gore@intel.com>
>
> WaC6DisallowByGfxPause is currently applied unconditionally
> but is not required in all revisions.
>
> v2: extend application of workaround to agree with w/a
> database, which differs from the HSD.
>
> References: HSD#2133391
> Signed-off-by: Tim Gore <tim.gore@intel.com>
> ---
> drivers/gpu/drm/i915/intel_guc_loader.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 605c696..96b0259 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
> }
>
> /* WaC6DisallowByGfxPause*/
> - I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
> + if (IS_SKL_REVID(dev, 0, SKL_REVID_C0) ||
> + IS_BXT_REVID(dev, 0, BXT_REVID_B0))
> + I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
>
> if (IS_BROXTON(dev))
> I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
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prev parent reply other threads:[~2016-07-21 3:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-20 10:00 [PATCH v2] drm/i915:gen9: restrict WaC6DisallowByGfxPause tim.gore
2016-07-20 10:38 ` ✗ Ro.CI.BAT: failure for drm/i915:gen9: restrict WaC6DisallowByGfxPause (rev2) Patchwork
2016-07-21 12:31 ` Gore, Tim
2016-07-21 13:48 ` Tvrtko Ursulin
2016-07-21 3:00 ` Kamble, Sagar A [this message]
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