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From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Kumar@freedesktop.org
Subject: Re: [PATCH 1/7] drm/i915/hsw+: set intel_crtc active once pipe is active
Date: Wed, 31 Aug 2016 19:34:07 +0530	[thread overview]
Message-ID: <57C6E3D7.7080006@intel.com> (raw)
In-Reply-To: <9c6eb488-cfdc-efcf-95c3-32f06645ba5a@linux.intel.com>

earlier implementation of "DDB writing" was using this flag before 
wait_for_vblank if we need to expand the DDB & it overlap with other 
pipe's DDB.
In that case, I observed on corner case requiring a cd-clock change, 
intel_update_watermarks was waiting for vblank, when it was called from 
haswell_crtc_enable function. This was leading to "vblank not available 
on crtc " warning (since vblank int was not yet enabled on that CRTC).
But as I can see we now no longer use wait for vblank during DDB writing 
if it's called from crtc_enable function after Paul's patch series, I 
can drop this patch all together.
thanks for review & input

Regards,
-Mahesh

On Wednesday 31 August 2016 04:21 PM, Maarten Lankhorst wrote:
> more state needs to be pre-calculated, rather than touching intel_crtc->active.
> Something like using the .initial_watermarks callback, we're so close to removing
> that non-atomic flag altogether.:-)
>
> ~Maarten

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  reply	other threads:[~2016-08-31 13:59 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-29 12:35 [PATCH 0/7] Implement New DDB allocation algorithm Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 1/7] drm/i915/hsw+: set intel_crtc active once pipe is active Kumar, Mahesh
2016-08-30 19:18   ` Zanoni, Paulo R
2016-08-31 10:51   ` Maarten Lankhorst
2016-08-31 14:04     ` Mahesh Kumar [this message]
2016-08-29 12:35 ` [PATCH 2/7] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 3/7] drm/i915/skl: pass pipe_wm in skl_compute_(wm_level/plane_wm) functions Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 4/7] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-08-31 13:38   ` Maarten Lankhorst
2016-08-31 14:18     ` Mahesh Kumar
2016-08-29 12:35 ` [PATCH 5/7] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-08-29 12:35 ` [PATCH] FOR_UPSTREAM [VPG]: drm/i915/skl+: Implement Transition WM Kumar, Mahesh
2016-08-30 19:32   ` Zanoni, Paulo R
2016-08-31 13:47     ` Zanoni, Paulo R
2016-09-02 11:46       ` Mahesh Kumar
2016-09-02 12:21         ` Zanoni, Paulo R
2016-08-29 12:35 ` [PATCH] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 0/9] New DDB Algo and WM fixes Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 1/9] drm/i915/skl: pass pipe_wm in skl_compute_(wm_level/plane_wm) functions Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 2/9] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 3/9] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 4/9] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 5/9] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 6/9] drm/i915/skl+: change WM calc to fixed point 16.16 Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 7/9] drm/i915/bxt: Enable IPC support Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA Kumar, Mahesh
2016-09-08 11:26   ` [PATCH v2 9/9] drm/i915/bxt: Implement Transition WM Kumar, Mahesh
2016-09-08 11:55 ` ✗ Fi.CI.BAT: failure for Implement New DDB allocation algorithm Patchwork

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