From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Kumar@freedesktop.org
Subject: Re: [PATCH 4/7] drm/i915/skl: New ddb allocation algorithm
Date: Wed, 31 Aug 2016 19:48:12 +0530 [thread overview]
Message-ID: <57C6E724.4030106@intel.com> (raw)
In-Reply-To: <9a38e619-cd52-b5de-d11a-77f51a388618@linux.intel.com>
Hi,
In this series, I'm not equalizing watermarks among planes of all
CRTC's, these patches equalizing it only among Planes of single CRTC
from DDB pool allocated for that CRTC, which doesn't require wait_for_vblank
So it'll not affect the FPS.
On Wednesday 31 August 2016 07:08 PM, Maarten Lankhorst wrote:
> Hey,
>
> Op 29-08-16 om 14:35 schreef Kumar, Mahesh:
>> This patch implements new DDB allocation algorithm as per HW team
>> suggestion. This algo takecare of scenario where we allocate less DDB
>> for the planes with lower relative pixel rate, but they require more DDB
>> to work.
>> It also takes care of enabling same watermark level for each
>> plane, for efficient power saving.
> Patch 2 and 3 look ok, I'm not a watermark expert though. :)
>
> To be honest, skylake watermarks are very complicated with all the interdepencies. I can understand this helps,
> but if you do separate per crtc atomic commits, it doesn't help a update for crtc1 may introduce a vblank wait on crtc2 and the other way around. This will drop the framerate to half.
>
> Is there no way around it?
>
> ~Maarten
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next prev parent reply other threads:[~2016-08-31 14:13 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-29 12:35 [PATCH 0/7] Implement New DDB allocation algorithm Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 1/7] drm/i915/hsw+: set intel_crtc active once pipe is active Kumar, Mahesh
2016-08-30 19:18 ` Zanoni, Paulo R
2016-08-31 10:51 ` Maarten Lankhorst
2016-08-31 14:04 ` Mahesh Kumar
2016-08-29 12:35 ` [PATCH 2/7] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 3/7] drm/i915/skl: pass pipe_wm in skl_compute_(wm_level/plane_wm) functions Kumar, Mahesh
2016-08-29 12:35 ` [PATCH 4/7] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-08-31 13:38 ` Maarten Lankhorst
2016-08-31 14:18 ` Mahesh Kumar [this message]
2016-08-29 12:35 ` [PATCH 5/7] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-08-29 12:35 ` [PATCH] FOR_UPSTREAM [VPG]: drm/i915/skl+: Implement Transition WM Kumar, Mahesh
2016-08-30 19:32 ` Zanoni, Paulo R
2016-08-31 13:47 ` Zanoni, Paulo R
2016-09-02 11:46 ` Mahesh Kumar
2016-09-02 12:21 ` Zanoni, Paulo R
2016-08-29 12:35 ` [PATCH] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 0/9] New DDB Algo and WM fixes Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 1/9] drm/i915/skl: pass pipe_wm in skl_compute_(wm_level/plane_wm) functions Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 2/9] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 3/9] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 4/9] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 5/9] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 6/9] drm/i915/skl+: change WM calc to fixed point 16.16 Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 7/9] drm/i915/bxt: Enable IPC support Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA Kumar, Mahesh
2016-09-08 11:26 ` [PATCH v2 9/9] drm/i915/bxt: Implement Transition WM Kumar, Mahesh
2016-09-08 11:55 ` ✗ Fi.CI.BAT: failure for Implement New DDB allocation algorithm Patchwork
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