From: meghanelogal <megha.i.nelogal@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: paulo.r.zanoni@intel.com, daniel.vetter@ffwll.ch,
intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com
Subject: Re: [PATCH v2] kms_atomic : Added subtest for Single Pipe DBUF validation
Date: Wed, 26 Oct 2016 14:10:49 +0530 [thread overview]
Message-ID: <58106C11.2010905@intel.com> (raw)
In-Reply-To: <20161026063931.u5bqrexg5xd3zyfo@phenom.ffwll.local>
Daniel,
I have already added platform check and is valid for platforms>=gen 9
This subtest is for Watermark/DDB kernel patches floated by Mahesh Kumar ..
reference -> https://patchwork.freedesktop.org/series/12222/
Regards,
Megha
On Wednesday 26 October 2016 12:09 PM, Daniel Vetter wrote:
> On Tue, Oct 25, 2016 at 02:40:00PM +0530, meghanelogal wrote:
>> Existing DDB algorithm divide the DDB wrt data rate,
>> hence the planes with the less height but same width
>> will be allocated less blocks and watermark are based
>> on width which requires more DDB. With this data the flip
>> may fail.
>>
>> In new DDB algorithm, the DDB is divided based on
>> watermark requirement.
>>
>> In this subtest, dividing the htotal/200 will allocate
>> ~2-4 blocks out of total(512/896), flip may fail with the
>> exisiting algorithm.But with the new algorithm it will pass.
>>
>> Signed-off-by: Megha Nelogal <megha.i.nelogal@intel.com>
> Pretty sure I mentioned this already, but how does this test work? It
> doesn't check for a specific platform/hw combo to make sure it's
> assumptions are valid, and you can't just assume that this will always
> work on all drivers/platforms.
>
> tbh not entirely sure of the value this provides here ...
> -Daniel
>
>> ---
>> tests/kms_atomic.c | 82 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 82 insertions(+)
>>
>> diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
>> index f27ee46..bfa4b35 100644
>> --- a/tests/kms_atomic.c
>> +++ b/tests/kms_atomic.c
>> @@ -1280,6 +1280,60 @@ static void atomic_invalid_params(struct kms_atomic_crtc_state *crtc,
>> do_ioctl_err(desc->fd, DRM_IOCTL_MODE_ATOMIC, &ioc, EFAULT);
>> }
>>
>> +static void validate_dbuf(struct kms_atomic_crtc_state *crtc,
>> + struct kms_atomic_plane_state **plane_array,
>> + int plane_count)
>> +{
>> + int i;
>> + struct kms_atomic_desc *desc = crtc->state->desc;
>> +
>> + /* for active crtc do modeset on the native resolution */
>> + drmModeAtomicReq *req = drmModeAtomicAlloc();
>> + struct drm_mode_modeinfo *mode = crtc->mode.data;
>> + struct kms_atomic_plane_state plane;
>> + struct igt_fb fb;
>> +
>> + crtc_populate_req(crtc, req);
>> +
>> + /* Add plane data to the structure...*/
>> + uint32_t crtc_x = 0;
>> + uint32_t crtc_y = 0;
>> +
>> + for (i = 0; i < plane_count; i++) {
>> + plane = *plane_array[i];
>> + uint32_t format = plane_get_igt_format(&plane);
>> +
>> + igt_require(format != 0);
>> + plane.src_x = 0;
>> + plane.src_y = 0;
>> + plane.src_w = (mode->hdisplay / (1)) << 16;
>> + plane.crtc_x = crtc_x;
>> + plane.crtc_y = crtc_y;
>> + plane.crtc_w = (mode->hdisplay) / (1);
>> + plane.crtc_h = (mode->vdisplay) / (i + 1);
>> +
>> + plane.crtc_id = crtc->obj;
>> +
>> + if (i%2 == 0) {
>> + plane.src_h = (mode->vdisplay / (1)) << 16;
>> + plane.crtc_h = (mode->vdisplay) / (1);
>> + }
>> +
>> + if (i%2 == 1) {
>> + plane.src_h = ceil((mode->vdisplay / 200) << 16);
>> + plane.crtc_h = ceil((mode->vdisplay / 200));
>> + }
>> +
>> + plane.fb_id = igt_create_fb(plane.state->desc->fd,
>> + plane.crtc_w, plane.crtc_h,
>> + format, I915_TILING_NONE, &fb);
>> + plane_populate_req(&plane, req);
>> + }
>> + do_atomic_commit(desc->fd, req, ATOMIC_RELAX_NONE);
>> + drmModeAtomicFree(req);
>> +}
>> +
>> +
>> igt_main
>> {
>> struct kms_atomic_desc desc;
>> @@ -1373,6 +1427,34 @@ igt_main
>> atomic_state_free(scratch);
>> }
>>
>> + igt_subtest("validate_dbuf") {
>> + int gen;
>> +
>> + gen = intel_gen(intel_get_drm_devid(desc.fd));
>> + igt_require(gen >= 9);
>> +
>> + struct kms_atomic_state *scratch = atomic_state_dup(current);
>> + struct kms_atomic_crtc_state *crtc = find_crtc(scratch, true);
>> + struct kms_atomic_plane_state *plane;
>> + struct kms_atomic_connector_state *connector =
>> + find_connector(scratch, crtc);
>> + struct kms_atomic_plane_state **plane_array = NULL;
>> + /* Enabling Two planes */
>> + plane_array = calloc(2, sizeof(struct kms_atomic_plane_state *));
>> + int plane_count = 0;
>> +
>> + igt_require(crtc);
>> + plane = find_plane(scratch, PLANE_TYPE_PRIMARY, crtc);
>> + igt_require(plane);
>> + plane_array[plane_count] = plane; plane_count++;
>> + plane = find_plane(scratch, PLANE_TYPE_OVERLAY, crtc);
>> + igt_require(plane);
>> + plane_array[plane_count] = plane; plane_count++;
>> + igt_require(connector);
>> + validate_dbuf(crtc, plane_array, plane_count);
>> + atomic_state_free(scratch);
>> + }
>> +
>> atomic_state_free(current);
>>
>> igt_fixture
>> --
>> 1.9.1
>>
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prev parent reply other threads:[~2016-10-26 8:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <mailto:20161013131629.GO20761@phenom.ffwll.local>
2016-10-25 9:10 ` [PATCH v2] kms_atomic : Added subtest for Single Pipe DBUF validation meghanelogal
2016-10-25 10:10 ` Chris Wilson
2016-10-26 6:39 ` Daniel Vetter
2016-10-26 8:40 ` meghanelogal [this message]
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