From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [PATCH 2/4] drm/i915: add plane enable/disable
	functions
Date: Thu, 30 Dec 2010 21:45:22 +0000
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To: Jesse Barnes <jbarnes@virtuousgeek.org>
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On Thu, 30 Dec 2010 13:40:30 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> On Thu, 30 Dec 2010 21:34:46 +0000
> Chris Wilson <chris@chris-wilson.co.uk> wrote:
> 
> > Trivial comment, on passing...
> > 
> > On Thu, 30 Dec 2010 13:16:30 -0800, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > > Add plane enable/disable functions to prevent duplicated code and allow
> > > us to easily check for plane enable/disable requirements (such as pipe
> > > enable).
> > 
> > > +static void intel_disable_plane(struct drm_i915_private *dev_priv,
> > > +				enum plane plane, enum pipe pipe)
> > > +{
> > > +	int reg;
> > > +	u32 val;
> > > +
> > > +	reg = DSPCNTR(plane);
> > > +	val = I915_READ(reg);
> > > +	val &= ~DISPLAY_PLANE_ENABLE;
> > > +	I915_WRITE(reg, val);
> > > +	POSTING_READ(reg);
> > 
> > > +	reg = DSPADDR(plane);
> > > +	I915_WRITE(reg, I915_READ(reg)); /* trigger an update */
> > 
> > Use intel_flush_display_plane(dev_priv, plane); though maybe that function
> > becomes redundant? Unlikely...
> 
> It was only used in one place after I added this, so I just stuffed the
> update trigger into this function and deleted flush_display_plane.

That was in the next function I read. ;-) I'd argue that the
intel_flush_display_plane(), with the requisite whitespacing, remains
clearer than the block of I915_READ/I915_WRITE + comment.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre