[PATCH 2/3] drm/i915/display: Introduce skl_pipe_scaler_setup()

Nemesa Garg
2026-03-26T12:04:12Z

As skl_pfit_enable and skl_scaler_setup_casf have similar logic for pipe
scaler registers so to avoid duplication introduce new helper
skl_pipe_scaler_setup. This helper consolidates common scaler setup
steps and is now called from both skl_pfit_enable() and
skl_scaler_setup_casf().

v2: Modify scaler_get_filter_select for casf.[Ankit]
Modify commit message. [Ankit]

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
---
drivers/gpu/drm/i915/display/skl_scaler.c | 86 +++++++++++------------
1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 7c5cb188ebf0..6de4be353402 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -725,9 +725,16 @@ static void glk_program_nearest_filter_coefs(struct intel_display *display,
GLK_PS_COEF_INDEX_SET(pipe, id, set), 0);
}

-static u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter)
+static u32 skl_scaler_get_filter_select(const struct intel_crtc_state *crtc_state)
{
- if (filter == DRM_SCALING_FILTER_NEAREST_NEIGHBOR)
+ if (crtc_state->hw.casf_params.casf_enable)
+ return (PS_FILTER_PROGRAMMED |
+ PS_Y_VERT_FILTER_SELECT(0) |
+ PS_Y_HORZ_FILTER_SELECT(0) |
+ PS_UV_VERT_FILTER_SELECT(0) |
+ PS_UV_HORZ_FILTER_SELECT(0));
+
+ if (crtc_state->hw.scaling_filter == DRM_SCALING_FILTER_NEAREST_NEIGHBOR)
return (PS_FILTER_PROGRAMMED |
PS_Y_VERT_FILTER_SELECT(0) |
PS_Y_HORZ_FILTER_SELECT(0) |
@@ -752,48 +759,52 @@ static void skl_scaler_setup_filter(struct intel_display *display,
}
}

-#define CASF_SCALER_FILTER_SELECT \
- (PS_FILTER_PROGRAMMED | \
- PS_Y_VERT_FILTER_SELECT(0) | \
- PS_Y_HORZ_FILTER_SELECT(0) | \
- PS_UV_VERT_FILTER_SELECT(0) | \
- PS_UV_HORZ_FILTER_SELECT(0))
-
-void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
+static void skl_pipe_scaler_setup(const struct intel_crtc_state *crtc_state,
+ int width, int height, int x, int y)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct intel_display *display = to_intel_display(crtc);
- struct drm_display_mode *adjusted_mode =
- &crtc_state->hw.adjusted_mode;
- struct intel_crtc_scaler_state *scaler_state =
+ const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
- struct drm_rect src, dest;
- int id, width, height;
- int x = 0, y = 0;
enum pipe pipe = crtc->pipe;
+ int id;
u32 ps_ctrl;

- width = adjusted_mode->crtc_hdisplay;
- height = adjusted_mode->crtc_vdisplay;
-
- drm_rect_init(&dest, x, y, width, height);
-
- width = drm_rect_width(&dest);
- height = drm_rect_height(&dest);
id = scaler_state->scaler_id;

- drm_rect_init(&src, 0, 0,
- drm_rect_width(&crtc_state->pipe_src) << 16,
- drm_rect_height(&crtc_state->pipe_src) << 16);
+ ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
+ skl_scaler_get_filter_select(crtc_state);

trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);

- ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
- CASF_SCALER_FILTER_SELECT;
+ skl_scaler_setup_filter(display, NULL, pipe, id, 0,
+ crtc_state->hw.scaling_filter);

intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
+
intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
+}
+
+void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ const struct intel_crtc_scaler_state *scaler_state =
+ &crtc_state->scaler_state;
+ struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
+ enum pipe pipe = crtc->pipe;
+ int width, height, x = 0, y = 0;
+ int id;
+
+ width = adjusted_mode->crtc_hdisplay;
+ height = adjusted_mode->crtc_vdisplay;
+
+ id = scaler_state->scaler_id;
+
+ skl_pipe_scaler_setup(crtc_state, width, height, x, y);
+
intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
}
@@ -814,7 +825,6 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
int hscale, vscale;
struct drm_rect src;
int id;
- u32 ps_ctrl;

if (!crtc_state->pch_pfit.enabled)
return;
@@ -836,24 +846,14 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);

- id = scaler_state->scaler_id;
-
- ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
- skl_scaler_get_filter_select(crtc_state->hw.scaling_filter);
-
- trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
-
- skl_scaler_setup_filter(display, NULL, pipe, id, 0,
- crtc_state->hw.scaling_filter);
+ skl_pipe_scaler_setup(crtc_state, width, height, x, y);

- intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
+ id = scaler_state->scaler_id;

intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id),
PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id),
PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
- intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
- PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
}
@@ -905,7 +905,7 @@ skl_program_plane_scaler(struct intel_dsb *dsb,
}

ps_ctrl = PS_SCALER_EN | PS_BINDING_PLANE(plane->id) | scaler->mode |
- skl_scaler_get_filter_select(plane_state->hw.scaling_filter);
+ skl_scaler_get_filter_select(crtc_state);

trace_intel_plane_scaler_update_arm(plane, scaler_id,
crtc_x, crtc_y, crtc_w, crtc_h);
--
2.25.1