[PATCH v4 0/5] GEN8+ GPU Watchdog Reset Support

Carlos Santa
2019-02-21T02:59:05Z

This is a rebased on the original patch series from Michel Thierry
that can be found here:

https://patchwork.freedesktop.org/series/21868

Note that this series is only limited to the GPU Watchdog timeout
for execlists as it leaves out support
for GuC based submission for a later time.

PATCH v4 of this series was successfully tested from userspace
through an IGT test gem_watchdog --run-subtest basic-bsd1,
that test not in upstream yet.

Also, the changes on the i965 media userspace driver are currently
under review at

https://github.com/intel/intel-vaapi-driver/pull/429/files

The testbed used on this series included a SKL-based NUC with
2 BSD rings as well as a KBL-based Chromebook with 1 BSD ring.

Michel Thierry (5):
drm/i915: Add engine reset count in get-reset-stats ioctl
drm/i915: Watchdog timeout: IRQ handler for gen8+
drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+
drm/i915: Watchdog timeout: DRM kernel interface to set the timeout
drm/i915: Watchdog timeout: Include threshold value in error state

drivers/gpu/drm/i915/i915_drv.h | 56 ++++++++++
drivers/gpu/drm/i915/i915_gem_context.c | 103 ++++++++++++++++-
drivers/gpu/drm/i915/i915_gem_context.h | 4 +
drivers/gpu/drm/i915/i915_gpu_error.c | 12 +-
drivers/gpu/drm/i915/i915_gpu_error.h | 5 +
drivers/gpu/drm/i915/i915_irq.c | 12 +-
drivers/gpu/drm/i915/i915_reg.h | 6 +
drivers/gpu/drm/i915/intel_engine_cs.c | 3 +
drivers/gpu/drm/i915/intel_hangcheck.c | 17 ++-
drivers/gpu/drm/i915/intel_lrc.c | 142 +++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_lrc.h | 2 +
drivers/gpu/drm/i915/intel_ringbuffer.h | 25 ++++-
include/uapi/drm/i915_drm.h | 7 +-
13 files changed, 374 insertions(+), 20 deletions(-)

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2.17.1