From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold()
Date: Tue, 09 Dec 2025 12:57:38 +0200 [thread overview]
Message-ID: <61b789d6739e227fc78cf9d70fbb82228e70b350@intel.com> (raw)
In-Reply-To: <20251208182637.334-17-ville.syrjala@linux.intel.com>
On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Extract the CRT sense check into a helper instead of repeating
> the same thing twice.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 6f216ba887bc..b71a8d97cdbb 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -693,6 +693,11 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)
> return ret;
> }
>
> +static bool intel_crt_sense_above_threshold(struct intel_display *display)
> +{
> + return intel_vga_read(display, VGA_IS0_R, true) & (1 << 4);
> +}
> +
> static enum drm_connector_status
> intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
> {
> @@ -704,7 +709,6 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
> u32 vsample;
> u32 vblank, vblank_start, vblank_end;
> u32 dsl;
> - u8 st00;
> enum drm_connector_status status;
>
> drm_dbg_kms(display->drm, "starting load-detect on CRT\n");
> @@ -738,8 +742,8 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
> * border color for Color info.
> */
> intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe));
> - st00 = intel_vga_read(display, VGA_IS0_R, true);
> - status = ((st00 & (1 << 4)) != 0) ?
> +
> + status = intel_crt_sense_above_threshold(display) ?
> connector_status_connected :
> connector_status_disconnected;
>
> @@ -779,15 +783,13 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
> while ((dsl = intel_de_read(display, PIPEDSL(display, pipe))) <= vsample)
> ;
> /*
> - * Watch ST00 for an entire scanline
> + * Watch sense for an entire scanline
> */
> detect = 0;
> count = 0;
> do {
> count++;
> - /* Read the ST00 VGA status register */
> - st00 = intel_vga_read(display, VGA_IS0_R, true);
> - if (st00 & (1 << 4))
> + if (intel_crt_sense_above_threshold(display))
> detect++;
> } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl));
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-12-09 10:57 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala
2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala
2025-12-09 10:23 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala
2025-12-09 10:26 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala
2025-12-09 10:27 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala
2025-12-09 10:28 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala
2025-12-09 10:29 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala
2025-12-09 10:32 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala
2025-12-09 10:35 ` Jani Nikula
2025-12-09 12:17 ` Ville Syrjälä
2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala
2025-12-09 10:39 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala
2025-12-09 10:40 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala
2025-12-09 10:47 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala
2025-12-09 10:49 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala
2025-12-09 10:52 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala
2025-12-09 10:53 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala
2025-12-08 21:07 ` kernel test robot
2025-12-08 21:18 ` kernel test robot
2025-12-08 22:22 ` kernel test robot
2025-12-09 7:55 ` [PATCH v2 " Ville Syrjala
2025-12-09 10:55 ` Jani Nikula
2025-12-10 14:13 ` [PATCH " kernel test robot
2025-12-10 14:24 ` kernel test robot
2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala
2025-12-09 10:56 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala
2025-12-09 10:57 ` Jani Nikula [this message]
2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala
2025-12-09 10:58 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala
2025-12-09 11:00 ` Jani Nikula
2025-12-09 11:01 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala
2025-12-09 11:03 ` Jani Nikula
2025-12-08 19:11 ` ✗ Fi.CI.BUILD: failure for drm/i915/vga: Try to sort out the VGA decode mess Patchwork
2025-12-09 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/vga: Try to sort out the VGA decode mess (rev2) Patchwork
2025-12-10 19:14 ` ✓ i915.CI.BAT: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) Patchwork
2025-12-11 3:23 ` ✓ i915.CI.Full: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=61b789d6739e227fc78cf9d70fbb82228e70b350@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).