From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, ramalingam.c@intel.com
Subject: Re: [PATCH] drm/i915: drrs_invalidate at flip schedule
Date: 17 May 2015 19:49:56 -0700 [thread overview]
Message-ID: <6299f3$lp17g0@orsmga002.jf.intel.com> (raw)
In-Reply-To: <1431635902-2185-1-git-send-email-ramalingam.c@intel.com>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6412
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 276/276 276/276
ILK 302/302 302/302
SNB -1 314/314 313/314
IVB 338/338 338/338
BYT 286/286 286/286
BDW 320/320 320/320
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
SNB igt@pm_rpm@dpms-mode-unset-non-lpsp DMESG_WARN(13)PASS(1) DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-05-18 2:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-14 20:38 [PATCH] drm/i915: drrs_invalidate at flip schedule Ramalingam C
2015-05-15 11:58 ` Chris Wilson
2015-05-15 13:24 ` Ramalingam C
2015-05-15 13:56 ` Chris Wilson
2015-05-18 2:49 ` shuang.he [this message]
2015-05-18 8:20 ` Daniel Vetter
2015-06-11 9:27 ` Ramalingam C
2015-06-15 9:52 ` Daniel Vetter
2015-06-15 15:15 ` Ramalingam C
2015-06-15 15:20 ` [PATCH] drm/i915: Restarting the Idleness DRRS in drrs_flush Ramalingam C
2015-06-15 15:46 ` Daniel Vetter
2015-06-11 9:38 ` [PATCH 1/2] drm/i915: fb_obj invalidate is divided into two functions Ramalingam C
2015-06-11 9:38 ` [PATCH 2/2] drm/i915: frontbuffer invalidate at flip schedule Ramalingam C
2015-06-11 9:56 ` Chris Wilson
2015-06-11 10:57 ` Ramalingam C
2015-06-14 20:59 ` shuang.he
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