From: shuang.he@intel.com
To: shuang.he@intel.com, julianx.dumez@linux.intel.com,
christophe.sureau@intel.com, lei.a.liu@intel.com,
intel-gfx@lists.freedesktop.org, ville.syrjala@linux.intel.com
Subject: Re: [PATCH 7/7] drm/i915: Kill intel_dp->{link_bw, rate_select}
Date: 10 Jul 2015 16:13:46 -0700 [thread overview]
Message-ID: <6299f3$mmtnh5@orsmga002.jf.intel.com> (raw)
In-Reply-To: <1436184606-18729-8-git-send-email-ville.syrjala@linux.intel.com>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6727
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK 303/303 303/303
SNB +3 309/316 312/316
IVB 343/343 343/343
BYT -1 285/285 284/285
HSW +13 367/381 380/381
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*SNB igt@kms_mmio_vs_cs_flip@setcrtc_vs_cs_flip DMESG_WARN(1) PASS(1)
*SNB igt@kms_mmio_vs_cs_flip@setplane_vs_cs_flip DMESG_WARN(1) PASS(1)
*SNB igt@pm_rpm@cursor DMESG_WARN(1) PASS(1)
*SNB igt@pm_rpm@cursor-dpms DMESG_FAIL(1) FAIL(1)
*BYT igt@gem_partial_pwrite_pread@reads-uncached PASS(1) FAIL(1)
*HSW igt@kms_mmio_vs_cs_flip@setplane_vs_cs_flip DMESG_WARN(1) PASS(1)
*HSW igt@pm_lpsp@non-edp DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@debugfs-read DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@gem-idle DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@gem-mmap-gtt DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@gem-pread DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@i2c DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@modeset-non-lpsp DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@modeset-non-lpsp-stress-no-wait DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@pci-d3-state DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@reg-read-ioctl DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@rte DMESG_WARN(1) PASS(1)
*HSW igt@pm_rpm@sysfs-read DMESG_WARN(1) PASS(1)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-07-10 23:13 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-06 12:09 [PATCH 0/7] drm/i915: Move DP link parameters out from intel_dp ville.syrjala
2015-07-06 12:10 ` [PATCH 1/7] drm/i915: Clean up DP/HDMI limited color range handling ville.syrjala
2015-08-13 6:16 ` Sivakumar Thulasimani
2015-08-13 12:01 ` Ville Syrjälä
2015-07-06 12:10 ` [PATCH 2/7] drm/i915: Don't use link_bw for PLL setup ville.syrjala
2015-07-07 8:05 ` Sivakumar Thulasimani
2015-08-11 17:21 ` [PATCH v2 " ville.syrjala
2015-07-06 12:10 ` [PATCH 3/7] drm/i915: Don't pass clock to DDI PLL select functions ville.syrjala
2015-07-07 8:07 ` Sivakumar Thulasimani
2015-07-06 12:10 ` [PATCH 4/7] drm/i915: Avoid confusion between DP and TRANS_DP_CTL in DP .get_config() ville.syrjala
2015-07-07 8:14 ` Sivakumar Thulasimani
2015-07-06 12:10 ` [PATCH 5/7] drm/i915: Move intel_dp->lane_count into pipe_config ville.syrjala
2015-07-06 13:39 ` [PATCH v2 " ville.syrjala
2015-08-13 7:00 ` Sivakumar Thulasimani
2015-07-06 12:10 ` [PATCH 6/7] drm/i915: Don't use link_bw to select between TP1 and TP3 ville.syrjala
2015-07-07 8:18 ` Sivakumar Thulasimani
2015-07-06 12:10 ` [PATCH 7/7] drm/i915: Kill intel_dp->{link_bw, rate_select} ville.syrjala
2015-07-07 8:46 ` Sivakumar Thulasimani
2015-07-10 23:13 ` shuang.he [this message]
2015-08-12 16:04 ` [PATCH 0/7] drm/i915: Move DP link parameters out from intel_dp Ville Syrjälä
2015-08-14 8:23 ` Daniel Vetter
2015-08-17 8:42 ` Maarten Lankhorst
2015-08-17 12:03 ` Ville Syrjälä
2015-08-25 12:57 ` Daniel Vetter
2015-08-25 14:11 ` Ville Syrjälä
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