Re: [Intel-gfx] [PATCH 11/28] drm/i915/pm: Move CONTEXT_VALID_BIT check

Matthew Auld
2021-11-02T16:14:15Z

On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
<maarten.lankhorst@linux.intel.com> wrote:
>
> Resetting will clear the CONTEXT_VALID_BIT, so wait until after that to test.
>

AFAIK this seems to be fixing something earlier in the series(maybe
patch 7?) i.e without this patch we seem to trigger the BUG_ON. If so,
this needs to be much earlier in the series?

Also this probably needs some more commentary in the commit message
for whether moving the BUG_ON matters, or if this is potentially
papering over something significant?

> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index a1334b48dde7..849fbb229bd3 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -52,8 +52,6 @@ static int __engine_unpark(struct intel_wakeref *wf)
> /* Discard stale context state from across idling */
> ce = engine->kernel_context;
> if (ce) {
> - GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, &ce->flags));
> -
> /* Flush all pending HW writes before we touch the context */
> while (unlikely(intel_context_inflight(ce)))
> intel_engine_flush_submission(engine);
> @@ -68,6 +66,9 @@ static int __engine_unpark(struct intel_wakeref *wf)
> ce->timeline->seqno,
> READ_ONCE(*ce->timeline->hwsp_seqno),
> ce->ring->emit);
> +
> + GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, &ce->flags));
> +
> GEM_BUG_ON(ce->timeline->seqno !=
> READ_ONCE(*ce->timeline->hwsp_seqno));
> }
> --
> 2.33.0
>