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X-CSE-MsgGUID: 6qzZ0/p1T9OBIWHfJ1wOiQ== X-ExtLoop1: 1 Received: from klitkey1-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.205]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2026 04:39:37 -0800 From: Jani Nikula To: Uma Shankar , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, Uma Shankar Subject: Re: [v3 09/19] drm/i915: Remove i915_reg.h from intel_overlay.c In-Reply-To: <20260129211358.1240283-10-uma.shankar@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20260129211358.1240283-1-uma.shankar@intel.com> <20260129211358.1240283-10-uma.shankar@intel.com> Date: Tue, 03 Feb 2026 14:39:34 +0200 Message-ID: <6369db33e0f8ec7e39dd5c531e19beb368cdac48@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 30 Jan 2026, Uma Shankar wrote: > Move GEN2_ISR and some interrupt definitions to common header. > This removes dependency of i915_reg.h from intel_overlay.c. > > v2: Create a separate file for common interrupts (Jani) > > Signed-off-by: Uma Shankar > --- > .../gpu/drm/i915/display/intel_display_irq.c | 1 + > .../gpu/drm/i915/display/intel_display_regs.h | 2 + > drivers/gpu/drm/i915/display/intel_overlay.c | 2 +- > drivers/gpu/drm/i915/gt/intel_gt.c | 1 + > .../gpu/drm/i915/gt/intel_ring_submission.c | 1 + > drivers/gpu/drm/i915/i915_irq.c | 1 + > drivers/gpu/drm/i915/i915_reg.h | 37 ---------------- > include/drm/intel/intel_gmd_interrupt.h | 43 +++++++++++++++++++ > 8 files changed, 50 insertions(+), 38 deletions(-) > create mode 100644 include/drm/intel/intel_gmd_interrupt.h > > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/g= pu/drm/i915/display/intel_display_irq.c > index 0a71840041de..31c78dc3d63b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c > @@ -5,6 +5,7 @@ >=20=20 > #include > #include > +#include >=20=20 > #include "i915_reg.h" > #include "icl_dsi_regs.h" > diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/= gpu/drm/i915/display/intel_display_regs.h > index 706024c2a463..40538910cb09 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h > @@ -94,6 +94,8 @@ > #define VLV_ERROR_PAGE_TABLE (1 << 4) > #define VLV_ERROR_CLAIM (1 << 0) >=20=20 > +#define GEN2_ISR _MMIO(0x20ac) > + > #define VLV_ERROR_REGS I915_ERROR_REGS(VLV_EMR, VLV_EIR) >=20=20 > #define _MBUS_ABOX0_CTL 0x45038 > diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/d= rm/i915/display/intel_overlay.c > index 88eb7ae5765c..3a45836b8373 100644 > --- a/drivers/gpu/drm/i915/display/intel_overlay.c > +++ b/drivers/gpu/drm/i915/display/intel_overlay.c > @@ -28,6 +28,7 @@ >=20=20 > #include > #include > +#include >=20=20 > #include "gem/i915_gem_internal.h" > #include "gem/i915_gem_object_frontbuffer.h" > @@ -37,7 +38,6 @@ > #include "gt/intel_ring.h" >=20=20 > #include "i915_drv.h" > -#include "i915_reg.h" > #include "intel_color_regs.h" > #include "intel_de.h" > #include "intel_display_regs.h" > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt= /intel_gt.c > index ac527d878820..998dea65fcff 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -5,6 +5,7 @@ >=20=20 > #include > #include > +#include >=20=20 > #include "gem/i915_gem_internal.h" > #include "gem/i915_gem_lmem.h" > diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gp= u/drm/i915/gt/intel_ring_submission.c > index 8314a4b0505e..7391c9b2ceb5 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c > +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c > @@ -4,6 +4,7 @@ > */ >=20=20 > #include > +#include >=20=20 > #include "gem/i915_gem_internal.h" >=20=20 > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index 3fe978d4ea53..2acdd739335f 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -34,6 +34,7 @@ > #include > #include > #include > +#include >=20=20 > #include "display/intel_display_irq.h" > #include "display/intel_hotplug.h" > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index 10928e8406dc..22b68ddfa7b4 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -365,7 +365,6 @@ > #define GEN2_IER _MMIO(0x20a0) > #define GEN2_IIR _MMIO(0x20a4) > #define GEN2_IMR _MMIO(0x20a8) > -#define GEN2_ISR _MMIO(0x20ac) >=20=20 > #define GEN2_IRQ_REGS I915_IRQ_REGS(GEN2_IMR, \ > GEN2_IER, \ > @@ -522,42 +521,6 @@ > /* These are all the "old" interrupts */ > #define ILK_BSD_USER_INTERRUPT (1 << 5) >=20=20 > -#define I915_PM_INTERRUPT (1 << 31) > -#define I915_ISP_INTERRUPT (1 << 22) > -#define I915_LPE_PIPE_B_INTERRUPT (1 << 21) > -#define I915_LPE_PIPE_A_INTERRUPT (1 << 20) > -#define I915_MIPIC_INTERRUPT (1 << 19) > -#define I915_MIPIA_INTERRUPT (1 << 18) > -#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 18) > -#define I915_DISPLAY_PORT_INTERRUPT (1 << 17) > -#define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT (1 << 16) > -#define I915_MASTER_ERROR_INTERRUPT (1 << 15) > -#define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT (1 << 14) > -#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1 << 14) /* p-state */ > -#define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT (1 << 13) > -#define I915_HWB_OOM_INTERRUPT (1 << 13) > -#define I915_LPE_PIPE_C_INTERRUPT (1 << 12) > -#define I915_SYNC_STATUS_INTERRUPT (1 << 12) > -#define I915_MISC_INTERRUPT (1 << 11) > -#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1 << 11) > -#define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT (1 << 10) > -#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1 << 10) > -#define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT (1 << 9) > -#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1 << 9) > -#define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT (1 << 8) > -#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1 << 8) > -#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1 << 7) > -#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1 << 6) > -#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1 << 5) > -#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1 << 4) > -#define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT (1 << 3) > -#define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT (1 << 2) > -#define I915_DEBUG_INTERRUPT (1 << 2) > -#define I915_WINVALID_INTERRUPT (1 << 1) > -#define I915_USER_INTERRUPT (1 << 1) > -#define I915_ASLE_INTERRUPT (1 << 0) > -#define I915_BSD_USER_INTERRUPT (1 << 25) > - > #define GEN6_BSD_RNCID _MMIO(0x12198) >=20=20 > #define GEN7_FF_THREAD_MODE _MMIO(0x20a0) > diff --git a/include/drm/intel/intel_gmd_interrupt.h b/include/drm/intel/= intel_gmd_interrupt.h > new file mode 100644 > index 000000000000..eae0acade16a > --- /dev/null > +++ b/include/drm/intel/intel_gmd_interrupt.h Here too I think I'd name this *_regs.h. Other than that, Reviewed-by: Jani Nikula > @@ -0,0 +1,43 @@ > +/* SPDX-License-Identifier: MIT */ > +/* Copyright =C2=A9 2026 Intel Corporation */ > + > +#ifndef _INTEL_GMD_INTERRUPT_H_ > +#define _INTEL_GMD_INTERRUPT_H_ > + > +#define I915_PM_INTERRUPT (1 << 31) > +#define I915_ISP_INTERRUPT (1 << 22) > +#define I915_LPE_PIPE_B_INTERRUPT (1 << 21) > +#define I915_LPE_PIPE_A_INTERRUPT (1 << 20) > +#define I915_MIPIC_INTERRUPT (1 << 19) > +#define I915_MIPIA_INTERRUPT (1 << 18) > +#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 18) > +#define I915_DISPLAY_PORT_INTERRUPT (1 << 17) > +#define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT (1 << 16) > +#define I915_MASTER_ERROR_INTERRUPT (1 << 15) > +#define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT (1 << 14) > +#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1 << 14) /* p-state */ > +#define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT (1 << 13) > +#define I915_HWB_OOM_INTERRUPT (1 << 13) > +#define I915_LPE_PIPE_C_INTERRUPT (1 << 12) > +#define I915_SYNC_STATUS_INTERRUPT (1 << 12) > +#define I915_MISC_INTERRUPT (1 << 11) > +#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1 << 11) > +#define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT (1 << 10) > +#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1 << 10) > +#define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT (1 << 9) > +#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1 << 9) > +#define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT (1 << 8) > +#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1 << 8) > +#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1 << 7) > +#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1 << 6) > +#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1 << 5) > +#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1 << 4) > +#define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT (1 << 3) > +#define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT (1 << 2) > +#define I915_DEBUG_INTERRUPT (1 << 2) > +#define I915_WINVALID_INTERRUPT (1 << 1) > +#define I915_USER_INTERRUPT (1 << 1) > +#define I915_ASLE_INTERRUPT (1 << 0) > +#define I915_BSD_USER_INTERRUPT (1 << 25) > + > +#endif --=20 Jani Nikula, Intel