From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,HK_RANDOM_FROM,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2620C4727D for ; Thu, 24 Sep 2020 13:43:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5BEEE2344C for ; Thu, 24 Sep 2020 13:43:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5BEEE2344C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B90436EB04; Thu, 24 Sep 2020 13:43:12 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 24DEC6EB04 for ; Thu, 24 Sep 2020 13:43:12 +0000 (UTC) IronPort-SDR: wv+Ynm5F+n8vDDFcRO1qMhMU0HOt/mYw2enBCxcX5s6FTRk7ay4lsH51cgsL6Z79lR+a9LVYP5 Ye07DjxKQnzw== X-IronPort-AV: E=McAfee;i="6000,8403,9753"; a="160493097" X-IronPort-AV: E=Sophos;i="5.77,297,1596524400"; d="scan'208";a="160493097" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2020 06:43:11 -0700 IronPort-SDR: e4dBiXYw1FtHHln+M6z7TmSgp+PAQLzNvsAjlen4ea9cLbEyVIZMd70yMStosXzMnTVni7UoEw 200Uu1D4foEw== X-IronPort-AV: E=Sophos;i="5.77,297,1596524400"; d="scan'208";a="486904921" Received: from dsmahang-mobl2.ger.corp.intel.com (HELO [10.252.48.167]) ([10.252.48.167]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2020 06:43:10 -0700 To: Chris Wilson , intel-gfx@lists.freedesktop.org References: <20200916094219.3878-1-chris@chris-wilson.co.uk> <20200916094219.3878-3-chris@chris-wilson.co.uk> From: Tvrtko Ursulin Organization: Intel Corporation UK Plc Message-ID: <6be94225-9d54-0a4b-d1d0-d5b46d8b6fdb@linux.intel.com> Date: Thu, 24 Sep 2020 14:43:08 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20200916094219.3878-3-chris@chris-wilson.co.uk> Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/gt: Always send a pulse down the engine after disabling heartbeat X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stable@vger.kernel.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On 16/09/2020 10:42, Chris Wilson wrote: > Currently, we check we can send a pulse prior to disabling the > heartbeat to verify that we can change the heartbeat, but since we may > re-evaluate execution upon changing the heartbeat interval we need another > pulse afterwards to refresh execution. > > Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs") > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen > Cc: # v5.7+ > --- > drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > index 8ffdf676c0a0..d09df370f7cd 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > @@ -192,10 +192,12 @@ int intel_engine_set_heartbeat(struct intel_engine_cs *engine, > WRITE_ONCE(engine->props.heartbeat_interval_ms, delay); > > if (intel_engine_pm_get_if_awake(engine)) { > - if (delay) > + if (delay) { > intel_engine_unpark_heartbeat(engine); > - else > + } else { > intel_engine_park_heartbeat(engine); > + intel_engine_pulse(engine); /* recheck execution */ > + } > intel_engine_pm_put(engine); > } > > I did not immediately get this one. Do we really need two pulses or maybe we could re-order the code a bit and just undo the heartbeat park if pulse after parking did not work? Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx