From: shuang.he@intel.com
To: shuang.he@intel.com, intel-gfx@lists.freedesktop.org,
bob.j.paauwe@intel.com
Subject: Re: [PATCH] drm/i915: Use correct pipe config to update pll
Date: 11 Nov 2014 13:19:25 -0800 [thread overview]
Message-ID: <6c3329$itrnc1@orsmga002.jf.intel.com> (raw)
In-Reply-To: <1415660963-17467-1-git-send-email-bob.j.paauwe@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform: baseline_drm_intel_nightly_pass_rate->patch_applied_pass_rate
BYT: pass/total=247/348->277/348
PNV: pass/total=326/328->328/328
ILK: pass/total=329/330->326/330
IVB: pass/total=544/546->545/546
SNB: pass/total=558/563->559/563
HSW: pass/total=572/577->572/577
BDW: pass/total=435/435->434/435
-------------------------------------Detailed-------------------------------------
test_platform: test_suite, test_case, result_with_drm_intel_nightly(count, machine_id...)...->result_with_patch_applied(count, machine_id)...
BYT: Intel_gpu_tools, igt_drv_hangman_error-state-basic, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_drv_hangman_error-state-capture-blt, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_drv_hangman_error-state-capture-bsd, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_drv_hangman_error-state-capture-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_drv_hangman_error-state-debugfs-entry, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_drv_hangman_error-state-sysfs-entry, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_ban-ctx-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_ban-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-blt, BLACKLIST(1, M31)DMESG_WARN(7, M31M36M29)PASS(8, M31M36M38) -> DMESG_WARN(2, M36)PASS(2, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-bsd, BLACKLIST(1, M31)DMESG_WARN(6, M36M29)PASS(9, M31M29M38M36) -> DMESG_WARN(2, M36)PASS(2, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-ctx-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-blt, BLACKLIST(1, M31)DMESG_WARN(7, M31M36M29)PASS(8, M31M36M29M38) -> DMESG_WARN(2, M36)PASS(2, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-bsd, BLACKLIST(1, M31)DMESG_WARN(7, M31M36M29)PASS(8, M31M36M29M38) -> DMESG_WARN(3, M36)PASS(1, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-reverse-blt, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-reverse-bsd, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-reverse-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_close-pending-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_params, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_params-ctx-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-count-blt, BLACKLIST(1, M31)DMESG_WARN(10, M31M36M29)PASS(5, M29M38M36) -> DMESG_WARN(3, M36)PASS(1, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-count-bsd, BLACKLIST(1, M31)DMESG_WARN(10, M31M36M29)PASS(5, M36M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-count-ctx-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-count-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-stats-blt, BLACKLIST(1, M31)DMESG_WARN(6, M36M29)PASS(9, M31M36M29M38) -> DMESG_WARN(2, M36)PASS(2, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-stats-bsd, BLACKLIST(1, M31)DMESG_WARN(7, M36M29)PASS(8, M31M36M29M38) -> DMESG_WARN(1, M36)PASS(3, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-stats-ctx-render, BLACKLIST(1, M31)PASS(15, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_reset-stats-render, BLACKLIST(1, M31)PASS(14, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_gem_reset_stats_unrelated-ctx-render, BLACKLIST(1, M31)PASS(12, M31M36M29M38) -> PASS(4, M36)
BYT: Intel_gpu_tools, igt_drv_hangman_ring-stop-sysfs-entry, BLACKLIST(1, M31)PASS(12, M31M36M29M38) -> PASS(4, M36)
PNV: Intel_gpu_tools, igt_kms_setmode_invalid-clone-exclusive-crtc, DMESG_WARN(1, M25)PASS(6, M24) -> DMESG_WARN(3, M24)PASS(1, M24)
PNV: Intel_gpu_tools, igt_kms_setmode_invalid-clone-single-crtc, DMESG_WARN(1, M25)TIMEOUT(7, M7M25M24)PASS(3, M24) -> DMESG_WARN(3, M24)PASS(1, M24)
ILK: Intel_gpu_tools, igt_kms_pipe_crc_basic_bad-nb-words-1, PASS(4, M26) -> DMESG_WARN(1, M26)PASS(3, M26)
ILK: Intel_gpu_tools, igt_kms_flip_flip-vs-fences-interruptible, PASS(4, M26) -> DMESG_WARN(1, M26)PASS(3, M26)
ILK: Intel_gpu_tools, igt_kms_flip_flip-vs-rmfb, PASS(4, M26) -> DMESG_WARN(1, M26)PASS(3, M26)
IVB: Intel_gpu_tools, igt_kms_plane_plane-position-covered-pipe-A-plane-1, TIMEOUT(1, M34)PASS(9, M21M4) -> PASS(4, M4)
SNB: Intel_gpu_tools, igt_kms_cursor_crc_cursor-256x256-sliding, DMESG_WARN(1, M35)PASS(9, M35M22) -> PASS(4, M35)
BDW: Intel_gpu_tools, igt_gem_reset_stats_ban-bsd, PASS(16, M42M30M28) -> DMESG_WARN(1, M28)PASS(3, M28)
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prev parent reply other threads:[~2014-11-11 21:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-08 0:07 [PATCH] drm/i915: Don't initialize pipe config after choosing DPLLs Bob Paauwe
2014-11-08 8:55 ` [PATCH] drm/i915: Don't initialize pipe config after shuang.he
2014-11-10 10:40 ` [PATCH] drm/i915: Don't initialize pipe config after choosing DPLLs Ville Syrjälä
2014-11-10 22:50 ` Bob Paauwe
2014-11-10 23:09 ` [PATCH] drm/i915: Use correct pipe config to update pll dividers Bob Paauwe
2014-11-11 9:16 ` Ander Conselvan de Oliveira
2014-11-11 17:29 ` [PATCH] drm/i915: Use correct pipe config to update pll dividers. V2 Bob Paauwe
2014-11-11 18:34 ` Jesse Barnes
2014-11-12 9:23 ` Daniel Vetter
2014-11-12 14:08 ` [PATCH] drm/i915: Use correct pipe config to update pll shuang.he
2014-11-11 21:19 ` shuang.he [this message]
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