From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH] drm/i915: Use pipe_config's cpu_transcoder for reading dp_mst hw state Date: 31 Jan 2015 22:12:57 -0800 Message-ID: <6c3329$k7ne0f@orsmga002.jf.intel.com> References: <1422611418-3753-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 501716E291 for ; Sat, 31 Jan 2015 22:12:59 -0800 (PST) In-Reply-To: <1422611418-3753-1-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, ander.conselvan.de.oliveira@intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA1Njg3Ci0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgMzUzLzM1MyAgICAgICAgICAgICAgMzUzLzM1MwpJTEsgICAgICAgICAgICAgICAgIC0x ICAgICAgICAgICAgICAzNTMvMzUzICAgICAgICAgICAgICAzNTIvMzUzClNOQiAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICA0MDAvNDIyICAgICAgICAgICAgICA0MDAvNDIyCklWQiAg ICAgICAgICAgICAgKzItMSAgICAgICAgICAgICAgNDg1LzQ4NyAgICAgICAgICAgICAgNDg2LzQ4 NwpCWVQgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgMjk2LzI5NiAgICAgICAgICAg ICAgMjk2LzI5NgpIU1cgICAgICAgICAgICAgICsxLTEgICAgICAgICAgICAgIDUwNy81MDggICAg ICAgICAgICAgIDUwNy81MDgKQkRXICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIDQw MS80MDIgICAgICAgICAgICAgIDQwMS80MDIKLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLURldGFpbGVkLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQpQbGF0 Zm9ybSAgVGVzdCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgZHJtLWludGVsLW5pZ2h0 bHkgICAgICAgICAgU2VyaWVzIEFwcGxpZWQKKklMSyAgaWd0X2dlbV91bmZlbmNlX2FjdGl2ZV9i dWZmZXJzICAgICAgUEFTUygyLCBNMjYpICAgICAgRE1FU0dfV0FSTigxLCBNMjYpCiBJVkIgIGln dF9nZW1fcHdyaXRlX3ByZWFkX3Nub29wZWQtcHdyaXRlLWJsdC1jcHVfbW1hcC1wZXJmb3JtYW5j ZSAgICAgIERNRVNHX1dBUk4oNiwgTTM0TTIxKVBBU1MoOCwgTTRNMzQpICAgICAgUEFTUygxLCBN MzQpCiBJVkIgIGlndF9nZW1fc3RvcmVkd19iYXRjaGVzX2xvb3Bfbm9ybWFsICAgICAgRE1FU0df V0FSTig1LCBNMzRNNClQQVNTKDE1LCBNMzRNNE0yMSkgICAgICBQQVNTKDEsIE0zNCkKIElWQiAg aWd0X2dlbV9zdG9yZWR3X2JhdGNoZXNfbG9vcF9zZWN1cmUtZGlzcGF0Y2ggICAgICBETUVTR19X QVJOKDEsIE0zNClQQVNTKDYsIE0zNE00KSAgICAgIERNRVNHX1dBUk4oMSwgTTM0KQoqSFNXICBp Z3RfZ2VtX3B3cml0ZV9wcmVhZF9kaXNwbGF5LWNvcHktcGVyZm9ybWFuY2UgICAgICBQQVNTKDUs IE00ME0yMCkgICAgICBETUVTR19XQVJOKDEsIE00MCkKIEhTVyAgaWd0X2dlbV9wd3JpdGVfcHJl YWRfc25vb3BlZC1wd3JpdGUtYmx0LWNwdV9tbWFwLXBlcmZvcm1hbmNlICAgICAgRE1FU0dfV0FS TigxLCBNNDApUEFTUygxOSwgTTQwTTIwKSAgICAgIFBBU1MoMSwgTTQwKQpOb3RlOiBZb3UgbmVl ZCB0byBwYXkgbW9yZSBhdHRlbnRpb24gdG8gbGluZSBzdGFydCB3aXRoICcqJwpfX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBs aXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNr dG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=