From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com
Subject: Re: [PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only
Date: 31 Jan 2015 09:17:43 -0800 [thread overview]
Message-ID: <71e320$fgircq@orsmga003.jf.intel.com> (raw)
In-Reply-To: <1422540820-10954-3-git-send-email-damien.lespiau@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5682
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 353/353 353/353
ILK 353/353 353/353
SNB 400/422 400/422
IVB +1-2 485/487 484/487
BYT 296/296 296/296
HSW +1-1 507/508 507/508
BDW -2 401/402 399/402
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*IVB igt_gem_evict_everything_minor-normal PASS(2, M34) DMESG_WARN(1, M34)
IVB igt_gem_storedw_batches_loop_normal DMESG_WARN(5, M34M4)PASS(15, M34M4M21) PASS(1, M34)
IVB igt_gem_storedw_batches_loop_secure-dispatch DMESG_WARN(1, M34)PASS(6, M34M4) DMESG_WARN(1, M34)
HSW igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance DMESG_WARN(1, M40)PASS(18, M40M20) PASS(1, M20)
HSW igt_gem_storedw_loop_vebox DMESG_WARN(2, M20)PASS(3, M40M20) DMESG_WARN(1, M20)
BDW igt_gem_pwrite_pread_display-pwrite-blt-gtt_mmap-performance DMESG_WARN(4, M28)PASS(2, M30) DMESG_WARN(1, M28)
*BDW igt_gem_pwrite_pread_uncached-pwrite-blt-gtt_mmap-performance PASS(6, M30M28) DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-01-31 17:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-29 14:13 [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT Damien Lespiau
2015-01-29 14:13 ` [PATCH 2/3] drm/i915/skl: Declare that GT3 has a second VCS Damien Lespiau
2015-02-04 1:55 ` Rodrigo Vivi
2015-02-04 9:27 ` Daniel Vetter
2015-02-04 13:22 ` [PATCH 2/3 v2] " Damien Lespiau
2015-02-04 15:43 ` Rodrigo Vivi
2015-01-29 14:13 ` [PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only Damien Lespiau
2015-01-31 17:17 ` shuang.he [this message]
2015-02-04 1:55 ` Rodrigo Vivi
2015-02-04 9:28 ` Daniel Vetter
2015-01-29 20:11 ` [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT Jeff McGee
2015-01-30 7:30 ` Jani Nikula
2015-01-30 16:05 ` Jeff McGee
2015-02-02 12:01 ` Damien Lespiau
2015-01-30 16:25 ` Daniel Vetter
2015-02-04 1:51 ` Rodrigo Vivi
2015-02-04 11:58 ` Damien Lespiau
2015-02-04 13:10 ` Damien Lespiau
2015-02-04 15:41 ` Rodrigo Vivi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='71e320$fgircq@orsmga003.jf.intel.com' \
--to=shuang.he@intel.com \
--cc=damien.lespiau@intel.com \
--cc=ethan.gao@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox