From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, jeff.mcgee@intel.com
Subject: Re: [PATCH 3/3] drm/i915: Request full SSEU enablement on Gen9
Date: 13 Feb 2015 18:41:47 -0800 [thread overview]
Message-ID: <71e320$fn0124@orsmga003.jf.intel.com> (raw)
In-Reply-To: <1423844876-20093-4-git-send-email-jeff.mcgee@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5774
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -1 281/281 280/281
ILK 313/313 313/313
SNB 309/309 309/309
IVB 382/382 382/382
BYT 296/296 296/296
HSW 426/426 426/426
BDW -1 318/318 317/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gen3_render_mixed_blits PASS(1) CRASH(1)
*BDW igt_gem_gtt_hog PASS(1) DMESG_WARN(1)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-02-14 2:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-13 16:27 [PATCH 0/3] Fix for SKL partial EU enablement jeff.mcgee
2015-02-13 16:27 ` [PATCH 1/3] drm/i915/skl: Determine SKL slice/subslice/EU info jeff.mcgee
2015-02-13 16:27 ` [PATCH 2/3] drm/i915/skl: Add SKL HW status to SSEU status jeff.mcgee
2015-02-13 16:27 ` [PATCH 3/3] drm/i915: Request full SSEU enablement on Gen9 jeff.mcgee
2015-02-14 2:41 ` shuang.he [this message]
2015-02-23 22:57 ` [PATCH 0/3] Fix for SKL partial EU enablement Daniel Vetter
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