From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 08/16] drm/i915/i2c: Convert from using GMBUS1 + reg_offset idiom to reg + 0 Date: Fri, 13 May 2011 10:28:34 +0100 Message-ID: <72a37e$j4eltu@orsmga002.jf.intel.com> References: <1305235044-9159-1-git-send-email-chris@chris-wilson.co.uk> <1305235044-9159-9-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id DFA049E7A4 for ; Fri, 13 May 2011 02:28:37 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Keith Packard Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 12 May 2011 17:40:42 -0700, Keith Packard wrote: > On Thu, 12 May 2011 22:17:16 +0100, Chris Wilson wrote: > > > Keith complained that GMBUSx + reg_offset was ugly. An alternative > > naming scheme which is more consistent with the reset of the code base > > is to store the address of the GMBUS0 and then reference each of the > > GMBUSx registers as an offset from GMBUS0. > > This looks completely wrong -- GMBUS1 is GMBUS0 + 4, not GMBUS0 + 1. That was shameful. > How about a simple function that computes the GMBUS register address > based on the device and a number? like: > > static int intel_gmbus_reg(struct drm_device *dev, int reg) { > int base = HAS_PCH_SPLIT(dev) ? PCH_GMBUS0 : GMBUS0; > > return base + reg * 4; And how about something like: #define I915_GMBUS_WRITE(reg, val) \ I915_WRITE(intel_gmbus_reg(dev_priv->dev, reg), val) I915_GMBUS_WRITE(0, val); For the body? -Chris -- Chris Wilson, Intel Open Source Technology Centre