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d="scan'208";a="212070049" Received: from slindbla-desk.ger.corp.intel.com (HELO localhost) ([10.245.246.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2026 04:54:23 -0800 From: Jani Nikula To: Uma Shankar , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, Uma Shankar Subject: Re: [v4 18/20] drm/i915: Remove i915_reg.h from intel_display_power_well.c In-Reply-To: <20260205094341.1882816-19-uma.shankar@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20260205094341.1882816-1-uma.shankar@intel.com> <20260205094341.1882816-19-uma.shankar@intel.com> Date: Wed, 11 Feb 2026 14:54:20 +0200 Message-ID: <78fa57c6237c918ea9ac55f45c1cff5a1936d081@intel.com> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 05 Feb 2026, Uma Shankar wrote: > Make intel_display_power_well.c free from including i915_reg.h. > > v3: Separate bit field for VLV (Ville) > > v2: Include specific pcode header, drop common header (Jani) > > Signed-off-by: Uma Shankar Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_display_power_well.c | 3 +-- > drivers/gpu/drm/i915/display/intel_display_regs.h | 1 + > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index 45c4313e6900..9c8d29839caf 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -8,7 +8,6 @@ > #include > #include > > -#include "i915_reg.h" > #include "intel_backlight_regs.h" > #include "intel_combo_phy.h" > #include "intel_combo_phy_regs.h" > @@ -1277,7 +1276,7 @@ static void vlv_init_display_clock_gating(struct intel_display *display) > * Disable trickle feed and enable pnd deadline calculation > */ > intel_de_write(display, MI_ARB_VLV, > - MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE); > + MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE_VLV); > intel_de_write(display, CBR1_VLV, 0); > > drm_WARN_ON(display->drm, DISPLAY_RUNTIME_INFO(display)->rawclk_freq == 0); > diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h > index 1c77a7de2d6e..d661385a1edd 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h > @@ -350,6 +350,7 @@ > #define FW_CSPWRDWNEN (1 << 15) > > #define MI_ARB_VLV _MMIO(VLV_DISPLAY_BASE + 0x6504) > +#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE_VLV (1 << 2) > > #define CZCLK_CDCLK_FREQ_RATIO _MMIO(VLV_DISPLAY_BASE + 0x6508) > #define CDCLK_FREQ_SHIFT 4 -- Jani Nikula, Intel