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From: "Shankar, Uma" <uma.shankar@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs
Date: Fri, 1 Apr 2022 06:21:20 +0000	[thread overview]
Message-ID: <7bfc92155cda464ba9b6277b920994aa@intel.com> (raw)
In-Reply-To: <20220322120015.28074-3-ville.syrjala@linux.intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS
> clock when dealing with DP->HDMI DFPs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently we only look at the DFPs max TMDS clock limit when considering whether
> the mode is valid, or whether we can do deep color. The sink's max TMDS clock limit
> may be lower than the DFPs, so we need to account for it as well.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4095
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2844
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++++-----
>  1 file changed, 19 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index e874d2f78088..3394e4951fef 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -856,20 +856,34 @@ static bool intel_dp_hdisplay_bad(struct drm_i915_private
> *dev_priv,
>  	return hdisplay == 4096 && !HAS_DDI(dev_priv);  }
> 
> +static int intel_dp_max_tmds_clock(struct intel_dp *intel_dp) {
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	int max_tmds_clock = intel_dp->dfp.max_tmds_clock;
> +
> +	/* Only consider the sink's max TMDS clock if we know this is a HDMI DFP */
> +	if (max_tmds_clock && info->max_tmds_clock)
> +		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
> +
> +	return max_tmds_clock;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
>  			  int clock, int bpc, bool ycbcr420_output)  {
> -	int tmds_clock;
> +	int tmds_clock, min_tmds_clock, max_tmds_clock;
> 
>  	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
> 
> -	if (intel_dp->dfp.min_tmds_clock &&
> -	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> +	min_tmds_clock = intel_dp->dfp.min_tmds_clock;
> +	max_tmds_clock = intel_dp_max_tmds_clock(intel_dp);
> +
> +	if (min_tmds_clock && tmds_clock < min_tmds_clock)
>  		return MODE_CLOCK_LOW;
> 
> -	if (intel_dp->dfp.max_tmds_clock &&
> -	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> +	if (max_tmds_clock && tmds_clock > max_tmds_clock)
>  		return MODE_CLOCK_HIGH;
> 
>  	return MODE_OK;
> --
> 2.34.1


  reply	other threads:[~2022-04-01  6:21 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-22 12:00 [Intel-gfx] [PATCH v2 00/12] drm/i915: Fix up DP DFP 4:2:0 handling more Ville Syrjala
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract intel_dp_tmds_clock_valid() Ville Syrjala
2022-04-01  6:19   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs Ville Syrjala
2022-04-01  6:21   ` Shankar, Uma [this message]
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 03/12] drm/i915/dp: Extract intel_dp_has_audio() Ville Syrjala
2022-04-01  6:22   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 04/12] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/ Ville Syrjala
2022-04-01  6:24   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder intel_dp_compute_config() a bit Ville Syrjala
2022-04-01  6:26   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 06/12] drm/i915/dp: Pass around intel_connector rather than drm_connector Ville Syrjala
2022-04-01  6:27   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 07/12] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes Ville Syrjala
2022-04-01  6:28   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 08/12] drm/i915/dp: Rework HDMI DFP TMDS clock handling Ville Syrjala
2022-04-01  6:38   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 09/12] drm/i915/dp: Add support for "4:2:0 also" modes for DP Ville Syrjala
2022-04-01  6:40   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 10/12] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs Ville Syrjala
2022-04-01  6:45   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 11/12] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix Ville Syrjala
2022-04-01  6:56   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now Ville Syrjala
2022-04-01  7:00   ` Shankar, Uma
2022-04-05 18:18     ` Ville Syrjälä
2022-03-22 12:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix up DP DFP 4:2:0 handling more (rev2) Patchwork
2022-03-22 13:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-22 19:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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