From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: [ANNOUNCE] xf86-video-intel 2.13.902 Date: Fri, 10 Dec 2010 15:43:19 +0000 Message-ID: <849307$an7qma@azsmga001.ch.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org, xorg-announce@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org It's getting close to party time, and so for all of those lucky enough to be receiving Sandy Bridge stocking fillers this Christmas, Intel would like to present you with a working driver... But first you have to help us test it! So without further ado, here is the first release candidate for 2010Q4. -Chris Chris Wilson (26): uxa: Fix crash after allocation failure i915: Disable maximum state addresses uxa: Relax fencing some more for gen3 Disable BLT for i830 and 845G i965: Use reciprocal scale factors to avoid the divide per-vertex-element i965: Upload an entire vbo in a single pwrite, rather than per-rectangle i965: Amalgamate surface binding tables Wait on the current buffer to complete when running synchronously. i965: Check for potential vertex array overflow every time i965: Also flush the vertex buffer when restarting the array. display: Flush any pending batches before changing modes. uxa: Prevent reading past the last byte on upload/download snb: Emit more invariants only once snb: Cache state between composite ops snb: Cache pixmap binding locations snb: Restore drawrect, we need the implicit flush snb: Only emit CC and DepthStencil bos once per batch uxa: Emit the damage after the render for the workaround in uxa_solid_rects Always flush the batch before blocking for new X requests i965: Invalidate pixmap binding location on reuse. i965: The RenderCache flush after every glyph is required for compiz i965: Mark sure we mark reused render targets as dirty Revert "i965: The RenderCache flush after every glyph is required for compiz" configure: Bump required libdrm to 2.4.23 NEWS: Add entry for the 2.13.902 snapshot configure: version bump for 2.13.902 Keith Packard (1): Mark outputs as DPMSModeOn and restore backlight at mode set Matthias Hopf (1): Don't use hardware acceleration on Sandybridge rev 07 hardware or earlier. git tag: 2.13.902 http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.13.902.tar.bz2 MD5: e93b7967df7839b0e4d220a2a7a2d0b7 xf86-video-intel-2.13.902.tar.bz2 SHA1: 3ecd3c8bcdf8229131335e3ba59eeb4380532284 xf86-video-intel-2.13.902.tar.bz2 http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.13.902.tar.gz MD5: 4e43c1861687da2f9621cc50931b5dc7 xf86-video-intel-2.13.902.tar.gz SHA1: 99512d07300948a0098065d10362d0e4b93679f8 xf86-video-intel-2.13.902.tar.gz -- Chris Wilson, Intel Open Source Technology Centre